서울과학기술대학교 컴퓨터구조연구실

  [Education & Experiences]
    Engineer, ABOV Semiconductor Co.
    2021.08, Master of Science in Electronic Engineering, Seoul National University of Science and Technology.
                   - Thesis Title : "Research on In-Vehicle Network for Communication among Electronic Controller Units"
    2019.03 - 2021.08, Graduate Student, Dept. of Electronic Engineering, Seoul National University of Science and Technology.
    2019.02, B.S. in Electronic Engineering, Myongji University.
    2018.08 - present, Research Assistant, SoC Platform Lab,Seout National University of Science and Technology.

  [Research Interests]
    SoC Design
    Computer Programing
    Digital System Design

  [Projects]
   - 뉴로모픽 기반 임베디드 인공지능 모듈 및 시스템 기술 개발, 산업통상자원부, 2019-2021.
   - 고성능컴퓨팅(HPC)을 위한 멀티코어 하드웨어 가속기 핵심 기술 개발, 과학기술정보통신부, 2019-2022.
   - 저전력 독립운용이 가능한 내장형 인공지능 모듈 및 내비게이션 응용 서비스 기술 개발, 산업통상자원부, 2017-2020.
   - 호흡치료기 디바이스용 경량 SW-SoC 솔루션 개발, 산업통상자원부, 2017-2020.

  [Publications]
International Journal Papers
  2.  "An FPGA-Based ECU for Remote Reconfiguration in Automotive Systems",
     Kwonneung Cho, Jeongeun Kim, Do Young Choi, Young Hyun Yoon, Jung Hwan Oh and Seung Eun Lee,
      Micromachines, Vol. 12, No. 1309, Oct. 2021.
  1.  "Energy Efficient and Low-Cost Server Architecture for Hadoop Storage Appliance",
     Do Young Choi, Jung Hwan Oh, Ji Kwang Kim, and Seung Eun LEE,
     KSII Transactions on Internet and Information Systems (TIIS), Vol. 14, No. 12, Dec. 2020.

International Conference Papers
  1.  "Flexible Embedded AI System with High-speed Neuromorphic Controller",
     Young Hyun Yoon, Su Yeon Jang, Do Young Choi, and Seung Eun LEE,
     16th International SoC Design Conference (ISOCC 2019), Jeju, Korea, Oct. 2019.

Korean Journal Papers
  1.  "차량 내부 네트워크를 위한 고속 CAN FD 컨트롤러",
     최도영, 윤영현, 오정환, 이승은,
     전자공학회 논문지, Vol.56, No.12, pp.109-116, Dec. 2019.

Korean Conferences Papers
  1.  "차량 내부 네트워크를 위한 고속 CAN FD 컨트롤러 설계",
     최도영, 윤영현, 오정환, 이승은
     2019 대한전자공학회 하계종합학술대회, 2019년 6월.

Chip Design Contest
  1.  "CAN FD controller Based On ISO-11898:2015",
     Young Hyun Yoon, Do Young Choi, Jung Hwan Oh, Jun Hyeok Yang and Seung Eun Lee,
     16th International SoC Design Conference (ISOCC CDC 2019), Jeju, Korea, Oct. 2019.

  [Awards]
  2019.06.28. 2019 대한전자공학회 하계종합학술대회 - 우수학생논문상

  [Skills]
   Hardware description language : Verilog
   High-level programming language : C/C++, Python
   Analysis language : MATLAB
   FPGA design tools : Synplify, Quartus II, Vivado
   EDA tools : ModelSim, NCsim, VCS, Design Compiler, Astro, IC Compiler I/II
   PCB design tools : ORCAD Pspice Designer, Allegro PCB Designer

  [Training]
    2019.05.28-05.30 - IC Compiler II를 활용한 Block-level Auto P&R, IDEC.
    2019.03.04-03.08 - Cell-Based Chip Design Flow, IDEC.
    2019.01.21-01.31 - Cortex-M0 DesignStart 기반의 SoC플랫폼 구성 및 활용, IDEC.
    2019.01.21-01.31 - 인피니언 연계 자동차용 반도체 전문인력 양성과정[심화], KSIA, Infineon.
    2019.01.07-01.18 - 인피니언 연계 자동차용 반도체 전문인력 양성과정[기본], KSIA, Infineon.
    2018.08.10-08.14 - Full-custom 설계 실습, IDEC.

  [Graduate Courses]
    CMOS Circuit Design Engineering, Advanced Digital Signal Processing, Advanced Computer Architecture,
    Modern Control Engineering, Special Topics on Digital Signal Processing, Resilient Processor Design,
    Speech and Audio Processing, Advanced DSP Architecture, Master's Thesis I
    Probability and Random Process, Master's Thesis II

  [Undergraduate Courses]
    Computer Programming(C Programming), Engineering Mathmatics, Electromagnetics,
    Computer Graphics, Electronic Circuits and Practice, Communication Engineering, Semiconductor Device,
    Microwave Engineering, Microprocessors, Signal and Systems, Digital Logic Circuit, Digital System,
    Digital Signal Processing, Machine Learning, Embeded System, System on Chip, Capstone Design

  [Chips]

3. "High-Speed automobile communication based on CAN-FD Controller"

   - Designer : Choi Do Young, Yoon Young Hyun, Hwang Gwan Beom, Cho Kwon Neung
   - Technology : TSMC 180um BCDMOS
   - Tape Out : 2020. 05. 13
   - Power Supply : 2.5V
   - Core Size : 2.5mm x 5mm

2. "A Low Power AI Processor for Embedded System"

   - Designer : Yoon Young Hyun, Hwang Gwan Beom, Choi Do Young
   - Technology : Samsung 65nm CMOSRF (1-poly 8-metal)
   - Tape Out : 2019. 9. 16
   - Power Supply : 1.8V
   - Core Size : 4mm x 4mm

1. "High-Speed Neuromorphic Network Controller for Multiple Neuro-Memories Processing"

   - Designer : Choi Do Young, Yoon Young Hyun, Jang Su Yeon
   - Technology : Magnachip hynix 0.35um CMOS
   - Tape Out : 2019. 6. 10
   - Power Supply : 3.3V
   - Core Size : 5mm x 4mm

Computer Architecture Laboratory