서울과학기술대학교 컴퓨터구조연구실

  [Education & Experiences]
    Researcher, Realtek Semiconductor Corp.
    2023.02, Master of Science in Electronic Engineering, Seoul National University of Science and Technology.
                   - Thesis Title : "Research on Data Pre-processing for Efficient Screen Transmission"
    2020.03 - 2023.02, Graduate Student, Dept. of Electronic Engineering, Seoul National University of Science and Technology.
    2020.02, B.S. in Electronic and Information Engineering, Seoul National University of Science and Technology.
    2018.06 - 2023.02, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.

  [Research Interests]
    Computer Programing
    Digital System Design
    SoC for Spiking Neural Network

  [Projects]
   - TWS용 근접/헬스케어 융합센서 SoC 개발, 산업통상자원부, 2021-2023.
   - 차세대 시스템 반도체 설계 전문인력양성 사업, 산업통상자원부, 2021-2026.
   - 뉴로모픽 기반 임베디드 인공지능 모듈 및 시스템 기술 개발, 산업통상자원부, 2019-2021.
   - 고성능컴퓨팅(HPC)을 위한 멀티코어 하드웨어 가속기 핵심 기술 개발, 과학기술정보통신부, 2019-2022.
   - 저전력 독립운용이 가능한 내장형 인공지능 모듈 및 내비게이션 응용 서비스 기술 개발, 산업통상자원부, 2017-2020.
   - 호흡치료기 디바이스용 경량 SW-SoC 솔루션 개발, 산업통상자원부, 2017-2020.

  [Publications]
International Journals Papers
  3.  "Simulation-Based Fault Analysis for Resilient System-On-Chip Design",
     Chang Yeop Han, Yeong Seob Jeong, and Seung Eun Lee,
     Journal of Information and Communication Convergence Engineering (JICCE), Vol. 19, No. 3, Sep. 2021.

  2.  "ASimOV: A Framework for Simulation and Optimization of an Embedded AI Accelerator",
     Dong Hyun Hwang, Chang Yeop Han, Hyun Woo Oh, and Seung Eun Lee,
     Micromachines, Vol. 12, No. 145, Jan. 2021.

  1.  "Lossless Decompression Accelerator for Embedded Processor with GUI",
     Gwan Beom Hwang, Kwon Neung Cho, Chang Yeop Han, Hyun Woo Oh, Young Hyun Yoon, and Seung Eun Lee,
     Micromachines, Vol. 12, No. 145, Jan. 2021.

Korean Journals Papers
  1.  "내장형 인공지능 프로세서를 위한 성능 분석기",
     황동현, 윤영현, 한창엽, 이승은,
     인터넷정보학회 논문지, Vol.21, No.5, Oct. 2020.

Patents
  1.   METHOD AND APPARATUS FOR TRANSFERRING SCREEN
      Registration No. 10-2167360-0000, Oct. 2020, Korea (right owned by SeoulTech)

Chip Design Contest
  4.  "A Low Cost and Low Power Neuromorphic Core for Embedded AI System",
      Su Yeon Jang, Jeong Eun Kim, Young Hyun Yoon, Chang Yeop Han, and Seung Eun Lee,
     ISOCC 2021, Jeju, Korea (On-site and Virtual Event), Oct. 2021.

  3.  "Stochastic Computing based Machine Learning for Embedded System",
      Su Yeon Jang, Chang Yeop Han, Young Hyun Yoon, and Seung Eun Lee,
     2021 IDEC Congress, Daejeon, Korea (Virtual Event), Jun. 2021.

  2.  "A Low Power AI Processor for face expression recognition based on k-NN and RBF",
      Young Hyun Yoon, Su Yeon Jang, Chang Yeop Han, Gwan Beom Hwang, Kwon Neung Cho and Seung Eun Lee,
     2020 IDEC Congress, Daejeon, Korea (Virtual Event), Jul. 2020.

  1.  "Low Power SoC with Digital Filter Accelerator for Embedded System",
      Gwan Beom Hwang, Young Hyun Yoon, Chang Yeop Han, Do Young Choi, Hyun Woo Oh, and Seung Eun LEE,
     2020 IDEC Congress, Daejeon, Korea (Virtual Event), Jul. 2020.

  [Presentations]
  1.  "Low Power SoC with Digital Filter Accelerator for Embedded System",
      Gwan Beom Hwang, Young Hyun Yoon, Chang Yeop Han, Do Young Choi, Hyun Woo Oh, and Seung Eun LEE,
     2020 IDEC Congress, Daejeon, Korea (Virtual Event), Jul. 2020.

  [Awards]
  2019.11.13. 2019 공학계열 졸업작품 전시회 - 최우수상[view]

  [Skills]
    - High-level Computer Language : C Programing, Python
    - Analysis Language : MATLAB
    - EDA tools: QuartusII, ModelSim, Design Compiler, Formality, VCS, IC Compiler, Astro
    - PCB design tools : ORCAD Pspice Designer, Allegro PCB Designer

  [Training]
    2020.08.10-08.14 - [IDEC 연구원 교육] Cell-Based 설계 Flow 교육, IDEC.
    2019.11.26-11.29 - [IDEC 연구원 교육] S28 공정용 Cell-Based 설계 Flow 교육, IDEC.
    2019.03.04-03.08 - [IDEC 연구원 교육] Cell-Based 설계 Flow 교육, IDEC.
    2019.02.11-02.12 - Cortex-M0 DesignStart 기반의 SoC 플랫폼 구성 및 활용, IDEC.
    2019.01.21-01.30 - 인피니언 연계 자동차용 반도체 전문인력 양성과정[심화], KSIA,Infineon.
    2019.01.07-01.18 - 인피니언 연계 자동차용 반도체 전문인력 양성과정[기본], KSIA,Infineon.
    2018.08.10-08.14 - Full-custom 설계 실습, IDEC.
    2018.07.02-07.04 - 스마트 모바일 AP 구조 및 주변장치 응용, IDEC.

  [Courses]
    Engineering Mathmatics, Electronic Circuit Theory, Electricity and Electronic Experiment,
    Electromagnetics, Computer Programming(C Programming), Logic Circuit, Signal System,
    Computer Application System Design, Microprocessor, Semiconductor Engineering, Electronic Circuits,
    Computer Architecture, Application of Microprocessor, Advanced Semiconductor Device, Mobile Programming
    Machine Learning, Operating System, Digital Signal Processing and Applications, Internet Protocol
    Capstone Design, Robotics(K-mooc), Intergrated Circuits

  [Chips]

6. "Implementation of Lossless Decompression Accelerator Based on Inflate Algorithm"

   - Designer : Hwang Gwan beom, Choi Do Young, Oh Hyun Woo, Han Chang Yeop
   - Technology : Samsung 65nm RFCMOS (1-poly 8-metal)
   - Tape Out : 2020. 09. 14
   - Power Supply : 1.2V
   - Core Size : 4mm x 4mm

5. "Communication System with Simple and Fast Communication Error Check Code Based on CRC"

   - Designer : Han Chang Yeop, Cho Kwon Neung, Oh Hyun Woo
   - Technology : Magnachip hynix 0.18um CMOS
   - Tape Out : 2020. 06. 01
   - Power Supply : 1.8V
   - Core Size : 3.4mm x 3.4mm

4. "A Low Cost and Low Power Neuromorphic Core for Embedded AI System"

   - Designer : Jang Su Yeon, Yoon Young Hyun, Han Chang Yeop
   - Technology : Samsung 65nm RFCMOS (1-poly 8-metal)
   - Tape Out : 2020. 05. 25
   - Power Supply : 1.2V
   - Core Size : 4mm x 4mm

3. "Stochastic Computing based Machine Learning for Embedded System"

   - Designer : Jang Su Yeon, Han Chang Yeop, Kim Jeong Bum
   - Technology : Magnachip hynix 0.18um CMOS
   - Tape Out : 2019. 11. 25
   - Power Supply : 3.3V
   - Core Size : 3.4mm x 3.4mm

2. "A Low Power SoC for Digital Signal Processing in Embedded System"

   - Designer : Hwang Gwan Beom, Yoon Young Hyun, Han Chang Yeop
   - Technology : Magnachip hynix 0.18um CMOS
   - Tape Out : 2019. 6. 17
   - Power Supply : 3.3V
   - Core Size : 3.8mm x 3.8mm

1. "A Low Power AI Processor for face expression recognition based on k-NN and RBF"

   - Designer : Yoon Young Hyun, Jang Su Yeon, Han Chang Yeop, Hwang Gwan Beom
   - Technology : Magnachip hynix 0.35um CMOS
   - Tape Out : 2019. 1. 14
   - Power Supply : 3.3V
   - Core Size : 5mm x 4mm

Computer Architecture Laboratory