서울과학기술대학교 컴퓨터구조연구실

  [Education & Experiences]
    Researcher, Electronics and Telecommunications Research Institute (ETRI)
    2022.02, Master of Science in Electronic Engineering, Seoul National University of Science and Technology.
                   - Thesis Title : "Multiple Artificial Intelligence Module Architecture and Platform for Federated System"
    2020.03 - 2022.02, Graduate Student, Dept. of Electronic Engineering, Seoul National University of Science and Technology.
    2020.02 - B.S. in Electronic Engineering, Seoul National University of Science and Technology.
    2018.03 - 2022.02, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.

  [Research Interests]
    System-on-Chip Design(SoC), Computer Architecture
    Stochastic Computing
    Digital System Design

  [Projects]
   - Developed proximity/healthcare convergence sensor SoC for TWS,
   Ministry of Trade, Industry and Energy, Korea, 2021-2023.
   - Next-Generation System Semiconductor Design Engineer Development Program,
   Ministry of Trade, Industry and Energy, Korea, 2021-2026.
   - Development of Embedded Artificial Intelligence Module and System Based on Neuromorphic,
   Ministry of Trade, Industry and Energy, Korea, 2019-2021.
   - Multi-core Hardware Accelerator for High-Performance Computing (HPC),
   Ministry of Science and ICT, Korea, 2019-2022.
   - Development of Independent Workable low-power Embedded Artificial Intelligent Module and Navigation Application Service,
   Ministry of Trade, Industry and Energy, Korea, 2017-2020.
   - Development of Light-weight SW-SoC Solution for Respiratory Medical Device,
   Ministry of Trade, Industry and Energy, Korea, 2017-2020.

  [Publications]
International Journals Papers
  1.  "A Multi-Core Controller for an Embedded AI System Supporting Parallel Recognition",
     Suyeon Jang, Hyun Woo Oh, Young Hyun Yoon, Dong Hyun Hwang, Won Sik Jeong, and Seung Eun LEE,
     Micromachines, Vol.12, No.8, Jul. 2021.

International Conference Papers
  4.  [Poster] "An Architecture for Resilient Federated Learning through Parallel Recognition",
     Jeongeun Kim, Youngwoo Jeong, Suyeon Jang, and Seung Eun LEE,
     The 31st International Conference on Parallel Architectures and Compilation Techniques (PACT 2022), Chicago, USA, Oct. 2022.
  3.  "Intelligent Transportation System based on an Edge AI",
      Young Woo Jeong, Hyun Woo Oh, Su Yeon Jang, and Seung Eun LEE,
     International Conference on Future Information & Communication Engineering (ICFICE 2022), Jeju, Korea, Jan. 2022.
  2.  "Stochastic Computing based AI System for Mobile Devices",
     Su Yeon Jang, Young Hyun Yoon, and Seung Eun LEE,
     38th IEEE International Conference on Consumer Electronics (ICCE 2020), Las Vegas, USA, Jan. 2020.
  1.  "Flexible Embedded AI System with High-speed Neuromorphic Controller",
     Young Hyun Yoon, Su Yeon Jang, Do Young Choi, and Seung Eun LEE,
     16th International SoC Design Conference (ISOCC 2019), Jeju, Oct. 2019.

Korean Journals Papers
  1.  "Design of a DMA Controller for Augmented Reality in Embedded System",
     Su Yeon Jang, Jung Hwan Oh, Young Hyun Yoon, Seong Mo Lee, and Seung Eun Lee,
     Journal of the Korea Institute of Information and Communication Engineering, vol.23, no.7, pp.822-828, Jul. 2019.

Chip Design Contest
  3.  "A Low Cost and Low Power Neuromorphic Core for Embedded AI System",
      Suyeon Jang, Jeong Eun Kim, Young Hyun Yoon, Chang Yeop Han, and Seung Eun LEE,
     18th International SoC Design Conference (ISOCC 2021), Jeju, Korea (Hybrid Conference), Oct. 2021.
  2.  "Stochastic Computing based Machine Learning for Embedded System",
      Su Yeon Jang, Chang Yeop Han, Young Hyun Yoon, and Seung Eun LEE,
     2021 IDEC Congress, Daejeon, Korea (Virtual Event), June. 2021.
  1.  "A Low Power AI Processor for Face Expression Recognition based on k-NN and RBF",
      Young Hyun Yoon, Su Yeon Jang, Gwan Beom Hwang, Kwon Neung Cho, and Seung Eun LEE,
     2020 IDEC Congress, Daejeon, Korea (Virtual Event), Jul. 2020.

  [Presentations]
  1.  "Stochastic Computing based AI System for Mobile Devices",
     International Conference on Consumer Electronics (ICCE 2020), Las Vegas, NV, USA, Jan. 2020.

  [Awards]
  2019.11.13. 2019 The Graduation Exhibition of Electronic Engineering - Grand Prize[view]

  [Skills]
   Hardware description language : Verilog-HDL
   FPGA design tools : Vivado, Quartus II
   Simulator : ModelSim, VCS, Xcelium
   EDA tools : Design Compiler, Astro, IC Compiler I/II, Prime Time, StarRCXT
   PCB design tools : ORCAD Pspice Designer, Allegro PCB Designer

  [Training]
    2021.05.07, 05.14 - Hardware Accelerator Architecture for Artificial Neural Networks, IDEC, Hanyang Univ.
    2020.08.10-08.14 - [IDEC Researer Training] Cell-based Design Flow, IDEC.
    2019.11.26-11.29 - [IDEC Researer Training] Cell-based Design for Samsumg 28nm Process, IDEC.
    2019.03.04-03.08 - [IDEC Researer Training] Cell-based Design Flow, IDEC.
    2019.02.11-02.12 - Design and Utilization of SoC Platform based on Cortex-M0 DesignStart, IDEC, Kwangwoon Univ.
    2019.01.21-01.31 - Automotive Semiconductor Expert Training[Advanced Course], KSIA, Infineon.
    2019.01.07-01.18 - Automotive Semiconductor Expert Training[Basic Course], KSIA, Infineon.
    2018.08.10-08.14 - Full Custom Design Training, IDEC, Kwangwoon Univ.
    2018.07.19 - MPW Design Training, IDEC.
    2018.07.02-07.04 - 스마트 모바일 AP 구조 및 주변장치 응용, IDEC, Kwangwoon Univ.

  [Courses]
    Computer Programming(C Programming), Engineering Mathmatics,
    Electromagnetics, Electronic Circuit Theory, Electricity and Electronic Experiment,
    Logic Circuit, Signal System, Computer Architecture, Mobile Programming,
    Computer Applicaton System Design, Semiconductor Engineering, Microprocessor,
    Control Engineering, Electronic Circuits,
    Application of Microprocessor, Advanced Semiconductor Devices,
    Digital Signal Processing and Applications, Operating System, Internet Protocol,
    Machine Learning, Capstone Design(1), Integrated Circuit, Capstone Design(2)

  [Chips]

5. "The Design of a Low Power Embedded AI System for Machine Learning"

   - Designer : Jang Su Yeon, Jeong Won Sik, Han Chang Yeop, Hwang Dong Hyun
   - Technology : Samsung 28nm RFCMOS (1-poly 8-metal)
   - Tape Out : 2021. 07. 19
   - Power Supply : 1.0V
   - Core Size : 2mm x 4mm

4. "A Low Cost and Low Power Neuromorphic Core for Embedded AI System"

   - Designer : Jang Su Yeon, Yoon Young Hyun, Han Chang Yeop
   - Technology : Samsung 65nm RFCMOS (1-poly 8-metal)
   - Tape Out : 2020. 05. 25
   - Power Supply : 1.2V
   - Core Size : 4mm x 4mm

3. "Stochastic Computing based Machine Learning for Embedded System"

   - Designer : Jang Su Yeon, Han Chang Yeop, Kim Jeong Bum
   - Technology : Magnachip hynix 0.18um CMOS
   - Tape Out : 2019. 11. 25
   - Power Supply : 3.3V
   - Core Size : 3.4mm x 3.4mm

2. "High-Speed Neuromorphic Network Controller for Multiple Neuro-Memories Processing"

   - Designer : Choi Do Young, Yoon Young Hyun, Jang Su Yeon
   - Technology : Magnachip hynix 0.35um CMOS
   - Tape Out : 2019. 6. 10
   - Power Supply : 3.3V
   - Core Size : 5mm x 4mm

1. "A Low Power AI Processor for face expression recognition based on k-NN and RBF"

   - Designer : Yoon Young Hyun, Jang Su Yeon, Han Chang Yeop, Hwang Gwan Beom
   - Technology : Magnachip hynix 0.35um CMOS
   - Tape Out : 2019. 1. 14
   - Power Supply : 3.3V
   - Core Size : 5mm x 4mm

Computer Architecture Laboratory