  [Education & Experiences]
    2023.09 - present, Ph.D. Student, University of Southern California (USC)
    2023.01 - 2023.07, Researcher, Convergence System R&D Division, Korea Electronics Technology Institute (KETI)
    2023.02, Master of Science in Electronic Engineering, Seoul National University of Science and Technology.
                   - Thesis Title : "Parallel Stochastic Computing Architecture for Computationally Intensive Applications"
    2021.03 - 2023.02, Graduate Student, Dept. of Electronic, Seoul National University of Science and Technology.
    2017.01 - 2021.01, HW Design Engineer, SEMES Co.
    2013.03 - 2017.02, Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.

  [Research Interests]
    Low-power and Resilient SoC Design
    Approximate Computing
    Hardware Acceleration
    Computer Architecture

  [Projects]
   - Development of DRAM PIM semiconductor technology for enhanced computing function for edge,
   Ministry of Science and ICT, Korea, 2022-2025.
   - ECC for high-speed SCM based PIM,
   Korea Electronics Technology Institute, Korea, 2022-2025.
   - Development for Processing Software on AI Semiconductor Devices,
  Ministry of Science and ICT, Korea, 2022-2029.
   - Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo),
  Ministry of Trade, Industry and Energy, Korea, 2021-2023.
   - Next-Generation System Semiconductor Design Engineer Development Program,
  Ministry of Trade, Industry and Energy, Korea, 2021-2026.
   - Embedded AI module based on neuromorphic,
  Ministry of Trade, Industry and Energy, Korea, 2019-2021.
   - Multi-core Hardware Accelerator for High-Performance Computing (HPC),
  Ministry of Science and ICT, Korea, 2019-2022.

  [Publications]
  International Journal Papers
  2.  "Parallel Stochastic Computing Architecture for Computationally Intensive Applications",
     Jeongeun Kim, Won Sik Jeong, Youngwoo Jeong, and Seung Eun Lee,
     Electronics, vol. 12, no. 7, Apr. 2023.
  1.  "An FPGA-Based ECU for Remote Reconfiguration in Automotive Systems",
     Kwonneung Cho, Jeongeun Kim, Do Young Choi, Young Hyun Yoon, Jung Hwan Oh and Seung Eun Lee,
      Micromachines, Vol. 12, No. 1309, Oct. 2021.

  International Conference Papers
  3.  "An Architecture for Resilient Federated Learning through Parallel Recognition",
     Jeongeun Kim, Youngwoo Jeong, Suyeon Jang, and Seung Eun Lee,
     The 31st International Conference on Parallel Architectures and Compilation Techniques (PACT 2022), Chicago, Oct. 2022.
  2.  "Reconfigurable Stochastic Computing Architecture for Computationally Intensive Applications",
     Jeongeun Kim, Yue Ri Jeong, Kwonneung Cho, Won Sik Jeong, and Seung Eun Lee,
     19th International SoC Design Conference (ISOCC 2022), Gangneung, Korea, Oct. 2022.
  1.  "A Local Interconnect Network Controller for Resource-Constrained Automotive Devices",
     Kwong Neunc Cho, Hyun Woo Oh, Jeongeun Kim, Young Woo Jeong, and Seung Eun Lee,
     International Conference on Consumer Electronics (ICCE 2022), Online, Jan. 2022.

Chip Design Contest
  1.  "A Low Cost and Low Power Neuromorphic Core for Embedded AI System" [view],
      Su Yeon Jang, Jeongeun Kim, Young Hyun Yoon, Chang Yeop Han, and Seung Eun Lee,
     ISOCC 2021, Jeju, Korea (On-site and Virtual Event), Oct. 2021.

  [Presentations]
  3.  "Reconfigurable Stochastic Computing Architecture for Computationally Intensive Applications" [view],
     The 19th International SoC Design Conference (ISOCC 2022), Gangneung, Oct. 2022.
  2.  "An Architecture for Resilient Federated Learning through Parallel Recognition" [view],
     The 31st International Conference on Parallel Architectures and Compilation Techniques (PACT 2022), Chicago, Oct. 2022.
  1.  "AI Processor employing Stocastic Computing for Embedded Systems" [view],
     The 23rd Semiconductor Design Competition of Korea, Sep. 2022.

  [Registered Copyright]
  SW.1  Stochastic Computing Circuit with Parallel Architecture
     Registration No.C-2023-023359, May, 2023, Korea(right owned by SeoulTech)

  [Awards]
  2022.10.06. The 23rd Semiconductor Design Competition of Korea - Corporate(LX Semicon) Special Award [view]
     Topic: AI Processor employing Stochastic Computing for Embedded Systems
     Korea Semiconductor Industry Association

  [Skills]
    - Hardware description language: Verilog
    - High-level Computer Language: C/C++, Python
    - EDA tools: VCS, Verdi, Design Compiler, ICC, ICC2, PrimeTime, StarRC, Altium, Quartus II, ModelSim

  [Training]
    2022.04.28-04.29 - Utilize FreeRTOS based on ARM Cortex-M processor, IDEC
    2021.11.01-11.05 - Cell-Based Design Flow Training for Samsung 28nm Technology, IDEC
    2021.10.19-10.21 - [Synopsys] Block-level Auto P&R using IC Compiler II, IDEC
    2021.09.02-09.03 - Machine Learning and Deep Learning with MATLAB, IDEC
    2021.07.29-07.30 - Increase efficiency of AI computation using FPGA, IDEC
    2021.07.27 - Power Management IC Design, Korea Semiconductor Research Association
    2021.07.15 - SoC Design and Development Methodology for Automotive Semiconductor, IDEC
    2021.07.05-07.09 - Cell-Based Chip Design Flow Training, IDEC
    2021.06.30-07.02 - [Infineon] Professional Training Course for Automotive Semiconductor, Korea Semiconductor Industry Association
    2021.06.04 - HDL Code Generation and FPGA/SoC Development Workflow using MATLAB and Simulink, IDEC
    2021.05.07-05.14 - Artificial Neural Network Hardware Accelerator Architecture, IDEC
    2021.05.03 - Hardware acceleration for machine learning, IDEC

  [Graduate Courses]
    Resilient Processor Design, AI Processor Architecture, SoC Design Methodology
    Advanced Computer Architecture, Pattern Recognition
    Introduction to integrated circuits and systems
    RF/Analog Integrated Circuits and Systems, Solid State Theory

  [Undergraduate Courses]
    Computer Programming(C Programming), Engineering Mathmatics, Electricity and Electronic Experiment,
    Electromagnetics, Logic Circuit, Signal System, Electronic Circuit Theory,
    Electronic Circuits, Microprocessor, Control Engineering, Digital System Design, Microwave Engineering
    Computer Architecture, Mobile Programming, Image Processing, Capstone Design(1), Capstone Design(2)

  [Chips]

4. "AI Processor based on Stochastic Computing for Embedded Systems"

      - Designer : Jeongeun Kim, Kwonneung Cho, Changyeop Han, Won Sik Jeong
      - Technology : Samsung 28nm RFCMOS (1-poly 8-metal)
      - Tape Out : 2022. 07. 18
      - Power Supply : 1.2V
      - Core Size : 2mm x 4mm

3. "In-Vehicle Network Processor based on Cortex-M0"

   - Designer :Cho Kwon Neung, Jeongeun Kim, Hyunwoo Oh
   - Technology : TSMC 180nm RFCMOS (1-poly 6-metal)
   - Tape Out : 2022. 03. 16
   - Power Supply : 1.8V
   - Core Size : 3.4mm x 3mm

2. "In-Vehicle Network Core based on CAN-FD and LIN Controller"

      - Designer : kwanghyun Go, Jeongeun Kim, Do Young Choi
      - Technology : DBHitek 180nm BCDMOS
      - Tape Out : 2021. 07. 19
      - Power Supply : 5V
      - Core Size : 5mm x 5mm

1. "32-bit processor with posit arithmetic coprocessor for embedded systems"

      - Designer : Hyunwoo Oh, Jeongeun Kim, Do Young Choi, Kwanghyun Go
      - Technology : Samsung 28nm CMOS
      - Tape Out : 2021. 07. 19
      - Power Supply : 1.2V
      - Core Size : 4mm x 2mm

Computer Architecture Laboratory