서울과학기술대학교 컴퓨터구조연구실

  [Education & Experiences]
    2024.04 - present, Engineer, SK hynix Inc. HBM Implementation Division
    2021.08 - 2024.04, Engineer, SK hynix Inc. SoC Integration Division
    2021.01 - 2021.08, Engineer, SK hynix Inc. MSPD(Memory Solution Product Design) Division
    2021.02, Master of Science in Electronic Engineering, Seoul National University of Science and Technology.
                   - Thesis Title : "Research on Hardware based Reconfigurable and Flexible Artificial Intelligence Processor Architecture and Platform"
    2019.03 - 2021.02, Graduate Student, Dept. of Electronic Engineering, Seoul National University of Science and Technology.
    2019.02, B.S. in Electronic and Information Engineering, Seoul National University of Science and Technology.
    2017.02 - 2021.02, Research Assistant, SoC Platforms Lab, Seoul National University of Science and Technology.

  [Research Interests]
    System-on-Chip: SoC for Machine Learning
    FPGA Reconfiguration
    Microprocessor, Embedded System

  [Projects]
   - 뉴로모픽 기반 임베디드 인공지능 모듈 및 시스템 기술 개발, 산업통상자원부, 2019-2021.
   - 고성능컴퓨팅(HPC)을 위한 멀티코어 하드웨어 가속기 핵심 기술 개발, 과학기술정보통신부, 2019-2022.
   - 저전력 독립운용이 가능한 내장형 인공지능 모듈 및 내비게이션 응용 서비스 기술 개발, 산업통상자원부, 2017-2020.
   - 호흡치료기 디바이스용 경량 SW-SoC 솔루션 개발, 산업통상자원부, 2017-2020.
   - Classified Topic, 현대엔지비, 2017-2018.

  [Publications]
International Journal Papers
  4.  "An FPGA-Based ECU for Remote Reconfiguration in Automotive Systems",
     Kwonneung Cho, Jeongeun Kim, Do Young Choi, Young Hyun Yoon, Jung Hwan Oh and Seung Eun Lee,
      Micromachines, Vol. 12, No. 1309, Oct. 2021.
  3.  "Lossless Decompression Accelerator for Embedded Processor with GUI",
     Gwan Beom Hwang, Kwon Neung Cho, Chang Yeop Han, Hyun Woo Oh, Young Hyun Yoon, and Seung Eun LEE,
      Micromachines, Vol. 12, No. 145, Jan. 2021.

  2.  "Intellino: Processor for Embedded Artificial Intelligence",
     Young Hyun Yoon, Dong Hyun Hwang, Jun Hyeok Yang, and Seung Eun LEE,
     MDPI Electronics, Vol.09, No.7, 2020.
  1.  "Design of a 128-bit AES Block Cipher Core",
     Jung Hwan Oh, Sang Muk Lee, Young Hyun Yoon, and Seung Eun LEE,
     Journal of Integrated Circuits and Systems (JICAS), Vol.03, No.4, pp.41-46, 2017.

International Conference Papers
  4.  "Stochastic Computing based AI System for Mobile Devices",
     Su Yeon Jang, Young Hyun Yoon, and Seung Eun LEE,
     International Conference on Consumer Electronics (ICCE2020), Las Vegas, NV, USA, Jan. 2020.
  3.  "Flexible Embedded AI System with High-speed Neuromorphic Controller",
     Young Hyun Yoon, Su Yeon Jang, Do Young Choi, and Seung Eun LEE,
     16th International SoC Design Conference (ISOCC 2019), Jeju, Korea, Oct. 2019.
  2.  "An FPGA-based Electronic Control Unit Controller for Automotive Systems",
     Jung Hwan Oh, Yoon Young Hyun, Ji Kwang Kim, Hyung Bin Ihm, Shin Hye Jeon, Tae Heon Kim, and Seung Eun LEE,
     International Conference on Consumer Electronics (ICCE2019), Las Vegas, NV, USA, Jan. 2019.
  1.  "Remote In-System Reconfiguration for Automotive Device",
     Yoon Young Hyun, Jung Hwan Oh, Ji Kwang Kim, Hyung Bin Ihm, Shin Hye Jeon, Tae Heon Kim, and Seung Eun LEE,
     International Conference on Consumer Electronics (ICCE2019), Las Vegas, NV, USA, Jan. 2019.

Korean Journal Papers
  3.  "내장형 인공지능 프로세서를 위한 성능 분석기",
     황동현, 윤영현, 한창엽, 이승은,
     인터넷정보학회 논문지, Vol.21, No.5, (Accepted), Oct. 2020.
  2.  "차량 내부 네트워크를 위한 고속 CAN FD 컨트롤러",
     최도영, 윤영현, 오정환, 이승은,
     전자공학회 논문지, Vol.56, No.12, pp.109-116, Dec. 2019.
  1.  "증강현실을 위한 임베디드 시스템의 DMA 컨트롤러 설계",
     장수연, 오정환, 윤영현, 이성모, 이승은,
     한국정보통신학회 논문지, Vol.23, No.7, pp.822-828, Jul. 2019.

Korean Conferences Papers
  2.  "차량 내부 네트워크를 위한 고속 CAN FD 컨트롤러 설계",
     최도영, 윤영현, 오정환, 이승은,
     2019 대한전자공학회 하계종합학술대회, 2019년 6월.
  1.  "차량 전장 제어를 위한 FPGA 기반 저전력 고속 직렬 통신 컨트롤러 설계",
     오정환, 윤영현, 임형빈, 전신혜, 이승은,
     2018 대한전자공학회 하계종합학술대회, 2018년 6월.

Chip Design Contest
  2.  "CAN FD controller Based On ISO-11898:2015",
     Young Hyun Yoon, Do Young Choi, Jung Hwan Oh, Jun Hyeok Yang and Seung Eun Lee,
     16th International SoC Design Conference (ISOCC CDC 2019), Jeju, Korea, Oct. 2019.
  1.  "Design of a CAN FD Controller for In-Vehicle Network Communication",
     Jung Hwan Oh, Young Hyun Yoon, Jung Woo Shin, Seung Hwan Lee, Chang Yeop Han and Seung Eun LEE,
     15th International SoC Design Conference (ISOCC CDC 2018), Daegu, Korea, Nov. 2018.

Tech note
  1.  "Companion Module Manual", Young Hyun Yoon, Feb. 2019.

  [Presentations]
  2.  "An FPGA-based Electronic Control Unit Controller for Automotive Systems",
     International Conference on Consumer Electronics (ICCE2019), Las Vegas, NV, USA, Jan. 2019.
  1.  "Remote In-System Reconfiguration for Automotive Device",
     International Conference on Consumer Electronics (ICCE2019), Las Vegas, NV, USA, Jan. 2019.

  [Awards]
  2019.06.28. 2019년도 하계종합학술대회 - 우수학생논문상
  2018.12.21. 2018 Intel FPGA Design Contest - Excellence Award
  2018.11.14. 2018 공학계열 졸업작품 전시회 - 우수상
  2018.10.15. 제19회 대한민국 반도체설계대전 - 한국반도체산업협회장상

  [Skills]
   High-level programming language : C/C++, Python, Java
   Hardware description language : Verilog
   Analysis language : MATLAB
   FPGA design tools : Synplify, Quartus II, Vivado
   EDA tools : ModelSim, NCsim, VCS, Design Compiler, Astro, IC Compiler I/II
   PCB design tools : ORCAD Pspice Designer, Allegro PCB Designer

  [Training]
    2019.05.28-05.30 - [Synopsys] IC Compiler II를 활용한 Block-level Auto P&R, IDEC.
    2019.03.04-03.08 - [IDEC 연구원 교육] Cell-Based 설계 Flow 교육, IDEC.
    2018.11.26-11.30 - [IDEC 연구원 교육] Cell-Based 설계 Flow 교육, IDEC.
    2018.02.19-02.23 - [IDEC 연구원 교육] Cell-Based 설계 Flow 교육, IDEC.
    2018.01.31-02.02 - [IDEC 연구원 교육] Full-Custom 설계 Flow 교육, IDEC.
    2018.01.10-01.11 - Deep Learning : 이해와 응용 (TensorFlow, Darknet, Tuny-DNN), IDEC.
    2017.08.21-08.24 - 지능형 웨어러블 Bio IoT 설계, IDEC.
    2017.08.08-08.11 - IoT 보안 설계, IDEC.
    2017.07.17-07.21 - 스마트 모바일 AP 구조 및 주변장치 응용, IDEC.
    2017.07.11 - AMBA AXI와 AXI-Stream 버스 설계와 검증, IDEC.
    2017.07.03-07.05 - Full-custom 설계 실습, IDEC.
    2017.02.07-02.09 - 기가비트 이더넷제어기 설계와 응용설계, IDEC.

  [Graduate Courses]
    Network-on-Chip, SoC Design Methodology,
    Embedded Software, Advanced Digital Signal Processing, Advanced Computer Architecture,
    Modern Control Engineering, Resilient Processor Design,
    Advanced DSP Architecture, Master's Thesis I/II

  [Undergraduate Courses]
    Computer Programming(C Programming), Digital Logic Circuit, Electromagnetics, Engineering Circuit Analysis,
    Electrical and Electronic Experiments, Engineering Mathmatics, Signals and Systems,
    Digital Signal Processing and Applications, Control System Engineering, Semiconductor Engineering,
    Computer Application System Design, Electronic Circuits, Microprocessor, Communication System,
    Mobile Programming, Computer Architecture, Internet Protocol, Communication System,
    Operating System, Capstone Design(1), Embedded System, Capstone Design(2)

  [Chips]

5. "A Low Power AI Processor for Embedded System"

   - Designer : Yoon Young Hyun, Hwang Gwan Beom, Choi Do Young
   - Technology : Samsung 65nm CMOSRF (1-poly 8-metal)
   - Tape Out : 2019. 9. 16
   - Power Supply : 1.8V
   - Core Size : 4mm x 4mm

4. "A Low Power SoC for Digital Signal Processing in Embedded System"

   - Designer : Hwang Gwan Beom, Yoon Young Hyun, Han Chang Yeop
   - Technology : Magnachip hynix 0.18um CMOS
   - Tape Out : 2019. 6. 17
   - Power Supply : 3.3V
   - Core Size : 3.8mm x 3.8mm

3. "High-Speed Neuromorphic Network Controller for Multiple Neuro-Memories Processing"

   - Designer : Choi Do Young, Yoon Young Hyun, Jang Su Yeon
   - Technology : Magnachip hynix 0.35um CMOS
   - Tape Out : 2019. 6. 10
   - Power Supply : 3.3V
   - Core Size : 5mm x 4mm

2. "A Low Power AI Processor for face expression recognition based on k-NN and RBF"

   - Designer : Yoon Young Hyun, Jang Su Yeon, Han Chang Yeop, Hwang Gwan Beom
   - Technology : Magnachip hynix 0.35um CMOS
   - Tape Out : 2019. 1. 14
   - Power Supply : 3.3V
   - Core Size : 5mm x 4mm

1. "CAN FD controller Based On ISO-11898:2015"

   - Designer : Yoon Young Hyun, Oh Jung Hwan, Yang Jun Hyeok
   - Technology : Magnachip hynix 0.18um CMOS (1-poly 6-metal)
   - Tape Out : 2018. 7. 23
   - Power Supply : 3.3V
   - Core Size : 3.8mm x 3.8mm

Computer Architecture Laboratory