Information Engineering
Seoul National University
of Science and Technology
232 Gongneung-ro, Nowon-gu,
01811, Seoul, KOREA
kimjinyeol
seoultech.ac.kr
Information Engineering
Seoul National University
of Science and Technology
232 Gongneung-ro, Nowon-gu,
01811, Seoul, KOREA
kimjinyeolseoultech.ac.kr2023.05 - present, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.
2019.03 - present, Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.
Processor Architecture
Digital System Design
Cryptographic Hardware Design
- Development of real time monitoring sensor for gas pipe,
Ministry of Trade, Industry and Energy, Korea, 2022-2026.
- Development of DRAM PIM semiconductor technology for enhanced computing function for edge,
Ministry of Science and ICT, Korea, 2022-2025.
- Development for Processing Software on AI Semiconductor Devices,
Ministry of Science and ICT, Korea, 2022-2029.
International Journal Papers
4. "Hardware-Based WebAssembly Accelerator for Embedded System",
Jinyeol Kim, Raehyeong Kim, Jongwon Oh and Seung Eun Lee,
Electronics, vol. 13, no. 3979, October. 2024
3. "Grid-Based DBSCAN Clustering Accelerator for LiDAR’s Point Cloud",
Sangho Lee, Seongmo An, Jinyeol Kim, Hun Namkung, Joungmin Park ,Raehyeong Kim, and Seung Eun Lee,
Electronics, vol. 13, no. 3395, Aug. 2024
2. "Lightweight and Error-Tolerant Stereo Matching with a Stochastic Computing Processor",
Seongmo An, Jongwon Oh, Sangho Lee, Jinyeol Kim, Youngwoo Jeong, Jeongeun Kim and Seung Eun Lee,
Electronics, vol.13, no. 2024, May 2024
1. "Accelerating Strawberry Ripeness Classification Using a Convolution-Baed Feature Extractor along with an Edge AI Processor",
Joungmin Park, Jinyoung Shin, Raehyeong Kim, Seongmo An, Sangho Lee, Jinyeol Kim, Jongwon Oh, Youngwoo Jeong, Soohee Kim, Yue Ri Jeong, and Seung Eun Lee,
Electronics, vol. 13, no. 344, Jan. 2024
International Conference Papers
6. "An Accelerated Block Searching Approach in A* for Autonomous Mobile Robots",
Jinyoung Shin, Joungmin Park, Jinyeol Kim, Yue Ri Jeong, Seongmo An, and Seung Eun Lee,
International Symposium on Circuits and Systems (ISCAS 2025), London, United Kingdom, May. 2025.
5. "Flexible NTT/iNTT Accelerator Based on Montgomery Reduction",
Jinyeol Kim, Jinyoung Shin, Seongmo An, Chaebin Lee, Dayoung Lee and Seung Eun Lee,
2025 International Conference on Consumer Electornics (ICCE), Las Vegas, NV, USA, January. 2025.
4. "Approximate Vector Operation Accelerator for Vision-Language Models",
Raehyeong Kim, Jongwon Oh, Jinyeol Kim, and Seung Eun Lee,
Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture (MICRO 2024)), Austin, USA, Nov. 2024.
4. "Accelerating Embedded WebAssembly Based on FPGA",
Jinyeol Kim, Raehyeong Kim, Jongwon Oh, and Seung Eun Lee,
21th International SoC Design Conference (ISOCC 2024), Hokkaido, Japan, August. 2024.
3. "On-Device Eye Tracking System with Dual Lightweight AI Processors",
Jongwon Oh, Raehyeong Kim, Jinyeol Kim, and Seung Eun Lee,
21th International SoC Design Conference (ISOCC 2024), Hokkaido, Japan, August. 2024.
2. "JPS Accelerator Based Global Path Planning Processor for Autonomous Mobile Robots",
Jinyoung Shin, Joungmin Park, Jinyeol Kim, Yue Ri Jeong, and Seung Eun Lee,
2nd Workshop on Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture (MICRO 2023)), Toronto, Canada, Oct. 2023.
1. "Continuous Convolution Accelerator with Data Reuse based on Systolic Architecture",
Joungmin Park, Seongmo An, Jinyeol Kim, and Seung Eun Lee,
International SoC Design Conference (ISOCC 2023), Jeju, Korea, Oct. 2023.
Korean Conference Papers
2. "Analysis of Model Lightweighting Effects on Korean-English Machine Translation using Transformer",
Raehyeong Kim, Jinyeol Kim, Joungmin Park, Yue Ri Jeong, and Seung Eun Lee,
The Institue of Electronics and Information Engineers Conference (IEIE 2024), Jeju, Korea, June. 2024.
1. "CNN Based Preprocessing for On-Device AI",
Jinyeol Kim, Jongwon Oh, Joungmin Park, and Seung Eun Lee,
Korean Conference on Semiconductors (KCS 2024), Gyeongju, Korea, January. 2024.
Student Research Competition
1. "An Approach for Lightweight and Error-Tolerent Binocular Stereo Matching with Stochastic Computing",
Seong Mo An, Sangho Lee, Jinyeol Kim and Seung Eun Lee,
ACM SRC @ 2023 International Symposium on Microarchitecture (MICRO), Toronto, Canada, Oct. 2023
[Presentation]
2. "Hardware-based WebAssembly Accelerator for Embedded System",
Jinyeol Kim, Raehyeong Kim, Jongwon Oh and Seung Eun Lee,
2024 IEEE Seoul Section Student Paper Contest, Seoul, Korea, December. 2024.
1. "Accelerating Embedded WebAssembly Based on FPGA",
Jinyeol Kim, Raehyeong Kim, Jongwon Oh and Seung Eun Lee,
21th International SoC Design Conference (ISOCC 2024), Hokkaido, Japan, August. 2024.
2025.01.14. The 2025 IEEE International Conference on on Consumer Electronics (ICCE 2025) - Best Session Presentation Award
Topic: Flexible NTT/iNTT Accelerator Based on Montgomery Reduction
IEEE(Institute of Electrical and Electronics Engineers)
2024.12.11. 2024 Korea Student Semiconductor IC Design Contest - Cadence Award
Topic: 동형암호를 위한 Montgomery 기반 fully pipelined NTT/iNTT
The Institute of Semiconductor Engineers
2024.12.7. 2024 IEEE Seoul Section Student Paper Contest - Bronze Award
Topic: Hardware-based WebAssembly Accelerator for Embedded System
IEEE Seoul Section
2024.10.24. The 25th Korean Semiconductor Design Competition - Corporate (Cadence) Special Award
Topic: Embedded system을 위한 하드웨어 WebAssembly 가속기
Korea Semiconductor Industry Association
Software
1. 임베디드 시스템(Embedded System)을 위한 하드웨어(Hardware) 웹어셈블리(WebAssembly) 가속기
Registration No.C-2024-047140, Dec, 2024, Korea (right owned by SeoulTech)
- High-level Programming Language: C Programming, Python, JAVA
- Hardware Description Language: Verilog
- Analysis Language: MATLAB
- FPGA Design Tools: Quartus II, Vivado
- EDA Tools: ModelSim
- Circuit Entry Tool: Virtuoso Schematic Editor
- Layout Tool: Virtuoso Layout Suite
2025.01.14-01.16 [IDEC] System Verilog를 이용한 검증 방법론
2025.01.08-01.10 [IDEC] Cell-Based Chip Design Front-End
2024.05.30-05.31 [IDEC] AMBA AXI와 AXI-Stream 설계와 검증
2024.05.22-05.24 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
Resilient Processor Design, Semiconductor Specialties
Digital System Design, Computer Architecture, Logic Circuit,
Operating System, Embedded System, Image Processing, Capstone Disign
Electronic Circuits, Electronic Circuits2, Circuit Theory, Signal System,
Control Systems Engineering, Electrical and Electronic Experiment,
Computer Programming(C Programming), Mobile Programming, Engineering Mathmatics,
Electromagnetics, Microwave engineering, Communiction system
1. "An Error Correcting Code Encoder Utilizing Orthogonal Latin Square Code
for HBM Application"
- Designer : Yue Ri Jeong, Sang Ho Lee,
Seongmo An, Jin Yeol Kim
- Technology : Samsung 28nm FD-SOI
- Tape Out : 2024.09.09
- Power Supply : 1.1V/1.8V
- Core Size : 4mm x 4mm
- Operating Frequency : 50M/200MHz
