서울과학기술대학교 컴퓨터구조연구실

  [Education & Experiences]
    2025.03 - present, Graduate Student, Dept. of Electronic, Seoul National University of Science and Technology.
    2023.03. - 2025.02., Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.
    2019.03. - 2025.02., Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.

  [Research Interests]
    Processor Architecture
    Deep Learning
    Digital System Design

  [Projects]
   - Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo),
   Ministry of Trade, Industry and Energy, Korea, 2021-2023.
   - Next-Generation System Semiconductor Design Engineer Development Program,
  Ministry of Trade, Industry and Energy, Korea, 2021-2026.
   - Development of DRAM PIM semiconductor technology for enhanced computing function for edge,
   Ministry of Science and ICT, Korea, 2022-2025.
   - Development of real time monitoring sensor for gas pipe,
   Ministry of Trade, Industry and Energy, Korea, 2022-2026.
   - Development for Processing Software on AI Semiconductor Devices,
   Ministry of Science and ICT, Korea, 2022-2029.

  [Publications]
  International Journal Papers
  7.    "Real-Time True Wireless Stereo Wearing Detection Using a PPG Sensor with Edge AI",
     Raehyeong Kim, Joungmin Park, Jaeseong Kim, Jongwon Oh, and Seung Eun Lee,
     Electronics, vol. 14, no. 19, Sep. 2025
  6.    "A CRC Comparison-Based Screen Data Management for Energy Efficient Virtual Desktop Infrastructure",
     Chang Yeop Han, Jongwon Oh, Jinyeol Kim, Raehyeong Kim, Kwanghyun Go, Jung Hwan Oh, and Seung Eun Lee,
     IEEE Access, vol. 13, June. 2025
  5.    "Hardware Accelerator for Approximation-Based Softmax and Layer Normalization in Transformers",
     Raehyeong Kim, Dayoung Lee, Jinyeol Kim, Joungmin Park, and Seung Eun Lee,
     Electronics, vol. 14, no. 12, June. 2025
  4.    "SEAM: A synergetic energy-efficient approximate multiplier for application demanding substantial computational resources",
     Youngwoo Jeong, Joungmin Park, Raehyeong Kim, and Seung Eun Lee,
     ELSEVIER Integration, vol. 101, no. 102337, Mar. 2025
  3.    "Hardware-Based WebAssembly Accelerator for Embedded System",
     Jinyeol Kim, Raehyeong Kim, Jongwon Oh, and Seung Eun Lee,
     Electronics, vol. 13, no. 20, Oct. 2024
  2.    "Grid-Based DBSCAN Clustering Accelerator for LiDAR’s Point Cloud",
     Sangho Lee, Seongmo An, Jinyeol Kim, Hun Namkung, Joungmin Park ,Raehyeong Kim, and Seung Eun Lee,
     Electronics, vol. 13, no. 17, Aug. 2024
  1.    "Accelerating Strawberry Ripeness Classification Using a Convolution-Based Feature Extractor along with an Edge AI Processor",
     Joungmin Park, Jinyoung Shin, Raehyeong Kim, Seongmo An, Sangho Lee, Jinyeol Kim, Jongwon Oh, Youngwoo Jeong, Soohee Kim, Yue Ri Jeong, and Seung Eun Lee,
     Electronics, vol. 13, no. 2, Jan. 2024

  International Conference Papers
  5.  "FPGA Based Approximate Vector Operation Accelerator for VLMs",
     Raehyeong Kim, Chaebin Lee, Dayoung Lee, Yue Ri Jeong, and Seung Eun Lee,
     2024 International Conference on Electronics, Information, and Communication (ICEIC)), Jan. 2025.
  4.  "Approximate Vector Operation Accelerator for Vision-Language Models",
     Raehyeong Kim, Jongwon Oh, Jinyeol Kim, and Seung Eun Lee,
     RoboARCH 2024(Co-located with the IEEE/ACM International Symposium on Microarchitecture (MICRO)), Nov. 2024.
  3.  "On-Device Eye Tracking System with Dual Lightweight AI Processors",
     Jongwon Oh, Raehyeong Kim, Jinyeol Kim, and Seung Eun Lee,
     2024 International SoC Design Conference (ISOCC)), Aug. 2024.
  2.  "Accelerating Embedded WebAssembly Based on FPGA",
     Jinyeol Kim, Raehyeong Kim, Jongwon Oh, and Seung Eun Lee,
     2024 International SoC Design Conference (ISOCC)), Aug. 2024.
  1.  "Point Cloud Clustering System with DBSCAN Algorithm for Low-Resolution LiDAR",
     Sangho Lee, Seongmo An, Raehyeong Kim, Jongwon Oh, and Seung Eun Lee,
     2024 International Conference on Consumer Electronics (ICCE 2024), Jan. 2024.

  Korean Conference Papers
  5.    "Analysis of Numeric Formats in Artificial Intelligence Balancing Accuracy and Resource Usage in Depth-Wise Convolutions",
      Dayoung Lee, Jaeseong Kim, Chaebin Lee, Joungmin Park, Raehyeong Kim, and Seung Eun Lee
      The 32nd Korean Conference on Semiconductors (KCS 2025), Feb. 2025.
  4.    "Bird Repellent System based on Embedded AI Processor",
      ALTANGEREL TSEVEENDORJ, Raehyeong Kim, Seongmo An, Yue Ri Jeong, and Seung Eun Lee
      2024 Winter Annual Conference of ISE, Jan. 2025.
  3.    "Analysis of Model Lightweighting Effects on Korean-English Machine Translation using Transformer",
      Raehyeong Kim, Jinyeol Kim, Joungmin Park, Yue Ri Jeong, and Seung Eun Lee
      2023 Summer Annual Conference of IEIE, June. 2024.
  2.    "TWS Wearing Detection System based on PPG Sensor using Embedded AI",
      Raehyeong Kim, Joungmin Park, Youngwoo Jeong, and Seung Eun Lee
      Institute of Semiconductor Engineering Conference (ISE), Dec. 2023.
  1.    "Matrix Computation Accelerator based on Systolic Array for Convolution Processing",
      Joungmin Park, Raehyeong Kim and Seung Eun Lee,
      Summer Annual Conference of IEIE 2023, Seoul, Korea, June. 2023.

  Chip Design Contest
  1.  "The Design of Robot-Specific Processor for Autonomous Driving",
     Youngwoo Jeong, Yue Ri Jeong, Hyun Woo Oh, Kwang Hyun Go, Raehyeong Kim, and Seung Eun Lee
     20th International SoC Design Conference (ISOCC 2023), Oct. 2023.

  [Presentations]
  4.    "FPGA Based Approximate Vector Operation Accelerator for VLMs"
      Raehyeong Kim, Chaebin Lee, Dayoung Lee, Yue Ri Jeong, and Seung Eun Lee,
      2024 International Conference on Electronics, Information, and Communication (ICEIC)) Osaka, Japan, Jan. 2025.
  3.    "Bird Repellent System based on Embedded AI Processor"
      ALTANGEREL TSEVEENDORJ, Raehyeong Kim, Seongmo An, Yue Ri Jeong, and Seung Eun Lee ,
      2024 Winter Annual Conference of ISE, Buyeo, Korea, Jan. 2025.
  2.    "Approximate Vector Operation Accelerator for Vision-Language Models"
      Raehyeong Kim, Jongwon Oh, Jinyeol Kim, and Seung Eun Lee,
      Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture (MICRO 2024)), Austin, USA, Nov. 2024.
  1.   "TWS Wearing Detection System based on PPG Sensor using Embedded AI",
      Raehyeong Kim, Joungmin Park, Youngwoo Jeong, and Seung Eun Lee,
      2023 Institute of Semiconductor Engineering Conference (ISE), Dec. 2023.

  [Awards]
  2025.07.15. | 2025 반도체공학회 Live 데모 경진대회 - 우수상
     The Institute of Semiconductor Engineers
  2024.12.11. | 2024 Korea Student Semiconductor IC Design Contest - Silver Award
     The Institute of Semiconductor Engineers
  2024.12.07. | 2024 IEEE Seoul Section Student Paper Contest - Bronze Award
     IEEE Seoul Section
  2023.11.07. | The 24nd Korean Semiconductor Design Competition of Korea - KIPO Commissioner Award
     Ministry of Trade, Industry and Energy

  [Registered Copyright]
Patents
  1.    Performance optimization technique utilizing hybrid model-based AI devices
      Application No. 10-2024-0167572, Nov. 2024, Korea (right owned by SeoulTech)
      Application No. PCT/KR2024/019962, Dec. 2024, PCT (right owned by SeoulTech)

Software
  3.   광혈류 측정법을 이용한 TWS(티더블유에스) 착용감지 프로그램(program)
     Registration No.C-2024-049980, Dec, 2024, Korea (right owned by SeoulTech)
  2.   자연어처리를 위한 트랜스포머 (Transformer) 추론 가속기
     Registration No.C-2024-049979, Dec, 2024, Korea (right owned by SeoulTech)
  1.   인공지능 가속기 성능 최적화를 위한 명령어 디코더 (decoder)
     Registration No.C-2024-049980, Dec, 2024, Korea (right owned by SeoulTech)

  [Skills]
    - High-level Programming Language: C, C++, Python, JAVA
    - Hardware Description Language: Verilog
    - Analysis Language: MATLAB
    - FPGA Design Tools: Quartus II, Vivado
    - EDA Tools:
       Front-end: Design Compiler, VCS, QuestaSim, PrimeTime, Formality
       Back-end: ICC2, Calibre, StarRC, ECO
    - Circuit Entry Tool: Virtuoso Schematic Editor
    - Layout Tool: Virtuoso Layout Suite

  [Training]
    2025.07.28-08.01 [IDEC] Cell-Based Chip Design Flow 교육
    2025.06.16-06.17 [IDEC] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
    2025.01.14-01.16 [IDEC] SystemVerilog를 이용한 검증 방법론
    2025.01.08-01.10 [IDEC] Cell-Based Chip Design Front-End 교육(칩설계)
    2025.01.06-01.07 [IDEC] 인공지능 기초 및 AI 반도체 구조
    2024.11.11-11.13 [SK-Hynix] AiM (Accelerator-in-Memory) 이론 및 실습
    2024.05.30-05.31 [IDEC] AMBA AXI와 AXI-Stream 설계와 검증
    2024.05.22-05.24 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
    2023.05.15-05.19 [IDEC] Cell-Based Chip Design Flow 교육
    2022.07.08-11.04 [MOEL] AI 자연어처리 전문가 양성 과정

  [Graduate Courses]
    CMOS Power Management IC Design | Advanced Artificial Intelligence Processor
    Special Lecture on Artificial Intelligence | Advanced Computer Architecture | Resilient Processor Design

  [Undergraduate Courses]
    Application of Microprocessor | Capstone Design | Computer Architecture | Computer Programming
    Control Engineering | Control System Design | Creative Engineering Design | Digital Signal Processing and applications
    Digital System Design | Electrical and Electronic Experiment | Electromagnetics | Electronic Circuit Theory
    Electronic Circuits | Engineering Mathmatics | Image Processing | Logic Circuit | Microprocessor | Mobile Programming
    Operating System | Semiconductor Engineering | Signal System

  [Chips]

4. "A Reconfigurable AI Processor Executing Lightweight Algorithms for Sequential Data Applications"

   - Designer: Raehyeong Kim, Jinyoung Shin, Jinyeol Kim, Dayoung Lee, Joungmin Park and Seung Eun Lee
   - Technology: Samsung 28nm FD-SOI
   - Tape Out: 2025.09.25
   - Power Supply: 1.1V / 1.8V
   - Core Size: 4mm x 4mm
   - Operating Frequency: 100MHz

3. "A Pipelined WebAssembly Processor Architecture for Accelerated Execution in Embedded IoT Systems"

   - Designer: Jinyeol Kim, Jongwon Oh, Raehyeong Kim, Chaebin Lee, Sangho Lee and Seung Eun Lee
   - Technology: Samsung 28nm FD-SOI
   - Tape Out: 2025.09.25
   - Power Supply: 1.1V / 1.8V
   - Core Size: 4mm x 4mm
   - Operating Frequency: 100MHz

2. "A Low-Power Point Cloud Clustering System with a DBSCAN Clustering Accelerator based on Cortex-M0"

   - Designer: Sangho Lee, Seongmo An, Raehyeong Kim, Jongwon Oh and Seung Eun Lee
   - Technology: Samsung 28nm FD-SOI
   - Tape Out: 2025.02.07
   - Power Supply: 1.1V / 1.8V
   - Core Size: 4mm x 4mm
   - Operating Frequency: 100MHz

1. "Convoltution-based Feature Extractor Equipped with an Improved Systolic Array Architecture"

   - Designer : Park Joungmin, Lee Sangho, Shin Jinyoung, Kim Raehyeong
   - Technology : Samsung 28nm LPP
   - Tape Out : 2024.07.18
   - Power Supply : 1.2V
   - Core Size : 4mm x 4mm
   - Operating Frequency : 50M/200MHz

Computer Architecture Laboratory