Seung Eun LEE - Professor
- Dept. of Electronic Engineering
- Seoul National University of Science and Technology (SeoulTech)
- #229 Changhak Hall
- 232 Gongneung-ro, Nowon-gu, Seoul, 01811, KOREA
Short Bio
Dr. Seung Eun Lee received the Ph.D. degree in electrical and computer engineering from the University of California, Irvine in 2008 and the B.S. and M.S. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology (KAIST) in 1998 and 2000, respectively. After graduating, he had been with Intel Labs, Hillsboro, OR, where he worked as a Platform Architect. In 2010, he joined the faculty of the Seoul National University of Science and Technology, Seoul. His research interests include computer architecture, System-on-Chip, low-power and resilient processor, and hardware acceleration for emerging applications.
Education
- University of California, Irvine , Doctor of Philosophy in Electrical and Computer Engineering, 2008.
- Design and Analysis of On-Chip Interconnection Network for Multi-Processor System-on-Chip
- KAIST , Master of Science in Electrical Engineering and Comptuer Science, 2000.
- Tele-presence 기능을 갖는 인터넷 기반 퍼스널 로봇의 구현
- (Implementation of Internet Based Personal Robot System with Tele-Presence)
- KAIST , Bachelor of Science in Electrical Engineering, 1998.
- Chonnam Science High School , 1994.
Academic & Professional Experiences
- 반도체 설계 공동연구소 소장 (Nov. 2022 – Present).
- AI 반도체 프로세싱 SW 연구센터(ITRC) 센터장 (Jul.2022 - Present).
- Professor , Dept. of Electronic and Information Engineering, Seoul National University of Science and Technology , Seoul, KOREA (Oct. 2021 - Present).
- Associate Professor , Dept. of Electronic and Information Engineering, Seoul National University of Science and Technology , Seoul, KOREA (Oct. 2016 - Sep. 2021).
- Assistant Professor , Dept. of Electronic and Information Engineering, Seoul National University of Science and Technology , Seoul, KOREA (Sep. 2010 - Sep. 2016).
- Platform Architect , SoC Platforms Architecture Lab., Intel Labs. , Hillsboro OR, USA (Mar. 2009 - Aug. 2010).
- Research Intern , Oregon Microarchitecture Lab., Intel Labs. , Hillsboro OR, USA (Jul. 2008 - Dec. 2008).
- Research Intern , Wireless Connectivity Group, Broadcom. , Irvine CA, USA (Jun. 2007 - Sep. 2007).
- Research Intern , SoC Design Group, Morpho Technology , Irvine CA, USA (Jun. 2006 - Sep. 2006).
- Research Assistant , Advanced Computer Architecture Group, University of California , Irvine CA, USA (Sep. 2005 - Dec. 2008).
- Researcher , SoC Research Center, Korea Electronics Technology Institute (KETI) , Seongnam, KOREA (Feb. 2000 - Feb. 2009).
Awards
Professional Services
- 반도체공학회 교육위원회 위원장, 2020-2022.
- Program Committee, Revire Activity The International Symposium on Circuits and Systems(ISCAS), 2018.
- Program Committee, Asia Symposium on Quality Electronic Design (ASQED), 2015.
- Program Committee, Interdisciplinary Engineering Design Education Conference (IEDEC), 2012 - 2014.
- Program Committee, Int'l Symposium on Quality Electronic Design (ISQED), 2010 - 2015.
- Program Committee, Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP), 2010 - 2018.
- Program Committee, Int'l Conf. Computer Architecture and Digital Systems, 2010 - 2013.
- Program Committee, 정보처리학회 추계 학술대회, 2012, 2018.
- Program Committee/Publications Committee, IEEE Asian Solid-State Circuits Conference (A-SSCC), 2011.
- Program Committee, IEEE Int'l Conf. on Electronics, Circuits, and Systems (ICECS), 2011.
Review Activities
- IEEE Trans. on Parallel and Distributed Systems
- IEEE Trans. on VLSI
- ACM Trans. on Architecture and Code Optimization
- Int'l J. of Computers & Electrical Engineering
- Microprocessors and Microsystems: Embedded Hardware Design
- Int'l J. of High Performance System Architecture
- Int'l J. of Computaional Science and Enginnering
- IEICE ELEX
- Int'l Journal of Computational Science and Engineering
- Int'l Journal of Information and Communication Convergence Engineering
- Int'l Journal of Embedded Systems
- Int'l Symposium on Networks-on-Chip (NOCS), 2013.
- IFIP/IEEE Int'l Conference on Very Large Scale Integration (VLSI-SoC), 2011.
- IEEE Int'l Symposium on Circuit and Systems (ISCAS), 2010, 2018.
- IEEE/ACM Int'l Conf. on Computer-Aided Design (ICCAD), 2009.
- Int'l Conf. on Information Technology: New Generations (ITNG), 2009.
- Reconfigurable Architecture Workshop (RAW), 2009.
- IEEE Int'l Conf. on Field Programmable Logic and Application (FPL), 2008.
- IEEE/ACM Asia and South Pacific Design Automation Conference (ASPDAC), 2008.
- Int'l Workshop on Applied Reconfigurable Computing (ARC), 2008.
- Int'l Conf. on Architecture of Computing Systems (ARCS), 2008.
Research Interests
Multiprocessor SoC, Network-on-Chip, Embedded System,Computer Architecture and VLSI design.
Current Researches @ SEOULTECH
Multi-Processor System-on-Chip (MPSoC)
Resilient/Low Power Circuit/System Design
Computing Systems
Resilient/Low Power Circuit/System Design
Computing Systems
Previous Researches before joining SEOULTECH
Network-on-Chip
- Converged fabric for multi-processor SoC (Intel Labs)
- Low power resilient on-chip interconnection network (Intel Labs)
- Power aware interconnection network for chip-multi processor (UCI)
- NePA: Networked Processor Array with 64 embedded RISC cores (UCI)
System-on-Chip
- Accelerators for Mobile Augmented Reality (Intel Labs)
- Accelerator for speech recognization (Intel Labs)
- DigRF for WCDMA processor (Broadcom)
- Turbo decoder/encoder interface logic for MS-2 processor (Morpho Tech.)
- SoC for multi-modal ubiquitous computing platform (KETI)
- WLAN baseband processor (KETI)
- Open platform based e-cash reader for IC card (KETI)
- Wireless audio processor using spread spectrum (KETI)
Computer Architecture
- Ultra low power core for SoC (Intel Labs)
- Low power cache architectures (Intel Labs)
- Aggressive voltage scaling for a low power adaptive pipeline (Intel Labs)
- MaRS: Macro-Pipelined Reconfigurable System (UCI)
- 32-bit 6-way high performance VLIW DSP (KETI)
Organic Light Emitting Diode (OLED) Driver IC
- Full color OLED driver IC (KETI)
- Mono OLED driver module for PCS phone (KETI)
Intelligent Robot System
- Internet based personal robot system (KAIST)
- Multi agent robot system (KAIST)
- Converged fabric for multi-processor SoC (Intel Labs)
- Low power resilient on-chip interconnection network (Intel Labs)
- Power aware interconnection network for chip-multi processor (UCI)
- NePA: Networked Processor Array with 64 embedded RISC cores (UCI)
System-on-Chip
- Accelerators for Mobile Augmented Reality (Intel Labs)
- Accelerator for speech recognization (Intel Labs)
- DigRF for WCDMA processor (Broadcom)
- Turbo decoder/encoder interface logic for MS-2 processor (Morpho Tech.)
- SoC for multi-modal ubiquitous computing platform (KETI)
- WLAN baseband processor (KETI)
- Open platform based e-cash reader for IC card (KETI)
- Wireless audio processor using spread spectrum (KETI)
Computer Architecture
- Ultra low power core for SoC (Intel Labs)
- Low power cache architectures (Intel Labs)
- Aggressive voltage scaling for a low power adaptive pipeline (Intel Labs)
- MaRS: Macro-Pipelined Reconfigurable System (UCI)
- 32-bit 6-way high performance VLIW DSP (KETI)
Organic Light Emitting Diode (OLED) Driver IC
- Full color OLED driver IC (KETI)
- Mono OLED driver module for PCS phone (KETI)
Intelligent Robot System
- Internet based personal robot system (KAIST)
- Multi agent robot system (KAIST)
Chip Photos
- I have fabricated more than 10 chips with KETI, Broadcom, and Intel. Please click HERE to see some of them.
- 2025 Spring: Digital System Design, Advanced AI Processor
- 2024 Fall: Computer Architecture, Advanced Computer Architecture
- 2024 Spring: Digital System Design, Resilient Processor Design
- 2023 Fall: Computer Architecture, Network on Chips
- 2023 Spring: Digital System Design
- 2022 Fall: Computer Architecture, Capstone Design II, Advanced AI Processor
- 2022 Spring: Digital System Design, Capstone Design I, Resilient Processor Design
- 2021 Fall: Computer Architecture, Capstone Design II, SoC Design Methodology
- 2021 Spring: Digital System Design, Capstone Design I, Advanced Computer Architecture
- 2020 Fall: Computer Architecture, Capstone Design II
- 2020 Spring: Digital System Design, Capstone Design I, Advanced DSP Architecture
- 2019 Fall: Computer Architecture, Integrated Circuits, Capstone Design II, Resilient Processor Design
- 2019 Spring: Digital System Design, Capstone Design I, Advanced Computer Architecture
- 2018 Fall: Computer Architecture, Capstone Design II, SoC Design Methodology
- 2018 Spring: Computer Application System Design, Capstone Design I, Network-on-Chips
- 2017 Fall: Computer Architecture, Advanced Computer Architecture
- 2016 Spring: Computer Application System Design, Capstone Design I, SoC Design Methodology
- 2015 Fall: Computer Architecture, Capstone Design II, Advanced Computer Architecture
- 2015 Spring: Computer Application System Design, Capstone Design I, Resilient Processor Design
- 2014 Fall: Computer Architecture, Capstone Design II, Network-on-Chips
- 2014 Spring: Advanced Computer Architecture, Computer Application System Design, Capstone Design I
- 2013 Fall: Computer Architecture, Capstone Design II
- 2013 Spring: Computer Application System Design, Capstone Design I
- 2012 Fall: Computer Architecture, Capstone Design II
- 2012 Spring: Advanced Computer Architecture, Computer Application System Design, Capstone Design I
- 2011 Fall: Computer Architecture, Computer Application System Design
- 2011 Spring: Digital System Design
- 2010 Fall: Logic Design, Computer Application System Design