Bonseung Koo (2026)
Dept. of Electronic and Information Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA
koobonseung
seoultech.ac.kr
Education & Experiences
2026.08, M.S. in Electronic Engineering, The Graduate School, Seoul National University of Science and Technology.
2021.11 - present, Researcher, Convergence Signal SoC Research Center, Korea Electronics Technology Institute.
2021.02, B.S. in Electronic and Information Engineering, Kyonggi University.
2021.11 - present, Researcher, Convergence Signal SoC Research Center, Korea Electronics Technology Institute.
2021.02, B.S. in Electronic and Information Engineering, Kyonggi University.
Research Interests
AI Accelerator
Deep Learning
Computer Programming
Digital System Design
Deep Learning
Computer Programming
Digital System Design
Projects
- Development of low-noise circuit technology for module interface for high-speed SCM memoryMinistry of Trade, Industry and Energy, Korea, 2022-2025.
- Development of CMOS LiDAR sensor and artificial intelligence SoC for fixed LiDARMinistry of Trade, Industry and Energy, Korea, 2021-2024.
- Development of an image sensor SoC capable of detecting two types of human tissue images with one shotMinistry of Trade, Industry and Energy, Korea, 2021-2023.
- Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo)Ministry of Trade, Industry and Energy, Korea, 2021-2023.
- Development of high-sensitivity magnetic sensor material process and 3-axis geomagnetic sensor technologyMinistry of Trade, Industry and Energy, Korea, 2021-2023.
Publications
Korean Conferences
- 6
- 5
- 4
- 3
- 2
- 1
Copyrights
Application
- 1 이중 평면 격자 기반의 3차원 포인트 클라우드 데이터 샘플링 방법 및 장치METHOD AND APPARATUS FOR SAMPLING 3D POINT CLOUD DATA BASED ON DUAL-PLANE GRIDApplication No. 10-2026-0135381, Jul. 2026, Korea (right owned by SeoulTech)
Skills
- High-level Programming Language: C Programming, Python
- Hardware Description Language: Verilog
- Functional Verification Tools: VCS
- RTL Synthesis Tools: Design Compiler
-FPGA Design Tool: Vivado
-Analysis Tool: MATLAB
Training
2023.11.08-11.10 [IDEC] Xilinx ZYNQ Device 설계 교육
2023.05.31-06.02 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
2022.08.03-08.05 [IDEC] Vivado 기반의 FPGA 설계 실습
2022.02.07-02.09 [IDEC] Verilog HDL 기초
2023.05.31-06.02 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
2022.08.03-08.05 [IDEC] Vivado 기반의 FPGA 설계 실습
2022.02.07-02.09 [IDEC] Verilog HDL 기초