Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA
kwonsunbeom
seoultech.ac.krGoogle Profile
Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA
kwonsunbeomseoultech.ac.krGoogle Profile
2021.11 - present, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.
2020.03 - present, Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.
Processor Architecture
Digital System Design
Digital Signal Processing
Cryptographic Hardware Design
- Development of DRAM PIM semiconductor technology for enhanced computing function for edge,
Ministry of Science and ICT, Korea, 2022-2025.
- ECC for high-speed SCM based PIM,
Korea Electronics Technology Institute, Korea, 2022-2025.
- Development for Processing Software on AI Semiconductor Devices,
Ministry of Science and ICT, Korea, 2022-2029.
- Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo),
Ministry of Trade, Industry and Energy, Korea, 2021-2023.
- Next-Generation System Semiconductor Design Engineer Development Program,
Ministry of Trade, Industry and Energy, Korea, 2021-2026.
International Journal Papers
1. "Photoplethysmography-Based Distance Estimation for True Wireless Stereo",
Youngwoo Jeong, Joungmin Park, Sun Beom Kwon, and Seung Eun Lee,
Micromachines, vol. 14, no. 2, Jan. 2023.
International Conference Papers
1. "A Real-Time Reconfigurable AI Processor Based on FPGA",
Yue Ri Jeong, Kwonneung Cho, Young Woo Jeong, Sun Beom Kwon, and Seung Eun Lee,
International Conference on Consumer Electronics (ICCE 2023), Las Vegas, USA, Jan. 2023.
2022.10.06. The 23rd Korean Semiconductor Design Competition - Corporate (Telechips) Special Award
- High-level Programming Language: C, JAVA, Python
- Hardware Description Language: Verilog
- FPGA Design Tools: Quartus II
- EDA Tools: ModelSim
ARM Cortex-M 프로세서 기반의 FreeRTOS 활용, IDEC
Cell-Based Chip Design Flow 교육, IDEC
인공지능반도체 설계: Deep-Learning Processing Unit Design and Implementation , IDEC
AMBA AXI와 AXI-Stream 설계와 검증, IDEC
Engineering Mathmatics, Computer Programming, Electromagnetics,
Electronic Circuit Theory, Logic Circuit,
Electronic Principles, Microprocessor Design, Data Communication, Digital System Design,
Digital Communication System, Programming Methodology,
Digital Integrated Circuits, Computer Architecture,
Operating System, Big Data and Machine Learning, Capstone Design
A RISC-V Processor Supporting AMBA AXI Protocol for Embedded Systems
- Designer : Jeong Won Sik, Kwon Sun Beom, Oh Hyun Woo, Kim Jeongeun
- Technology : Samsung 28nm RFCMOS(1-poly 8-metal)
- Tape Out : 2022. 07.18
- Power Supply : 1.2V
- Core Size : 2mm x 4mm
