← Alumni
Juseong Lee

Juseong Lee (2013)

Dept. of Electronic and Information Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA

Education & Experiences

2009.03 - 2011.02, Yuhan college, Bachelor of Electronic and Information Engineering.
2011.06 - 2012.12, Research Assistant, SoC Platforms Lab., Seoul National University of Science and Technology.
2013.02, B.S. in Dept. of Electronic and Information Engineering, Seoul National University of Science and Technology.
2013.03 - , M.S. student, School of Electrical Engineering, Korea University.

Research Interests

-Digital System Application
-Computer Architecture
-Low Power Circuit Design
-Hardware Overhead

Projects

  1. Data transfer and receive in Virtex5, Xilinx.
  2. Low-power FPGA-Implementation of atan(X/Y).
  3. Image Processing Using the FFT algorithm.
  4. Intra-Body Communication.
  5. FPGA prototyping for channel estimation.
  6. Analyze Area of Digital Filter.

Publications

International Conferences

  1. 4
    Intra-Body Communication for Personal Area Network
    Sangdon Kim, Ju Seong LEE, Yeongseob Jeong, Jihoon Jang, Seung Eun LEE, SangMuk Lee
    Lecture Notes in Electrical Engineering · Vol. 260 · pp. 335-339 · 2013
  2. 3
    mrGlove: FPGA-based data glove for heterogeneous devices
    Seongmo Lee, Jihoon Jang, DaeYoung PARK, Sangdon Kim, Ju Seong LEE, Seon Kyeong Kim, Seung Eun LEE
    Lecture Notes in Electrical Engineering · Vol. 260 · pp. 341-345 · 2013
  3. 2
    SDRAM Controller for Retention Time Analysis in Low Power Signal Processor
    Sangdon Kim, Yeongseob Jeong, Ju Seong LEE, Seung Eun LEE
    Lecture Notes in Electrical Engineering · Vol. 222 · pp. 303-309 · 2013
  4. 1
    Hardware Overhead vs. Performance of Matrix Multiplication on FPGA
    Ju Seong LEE, Sangdon Kim, Yeongseob Jeong, Seung Eun LEE
    Lecture Notes in Electrical Engineering · Vol. 222 · pp. 295-302 · 2013

Tech. Notes

1 Ju-seong, Lee, "CORDIC algorithm, " SPL Tech. Note no.1, Oct. 2011.

Presentations

  • 4 "About Block RAM in FPGA, " SPL meeting. Jul. 2012.
  • 3 "Intra-Body Communication, " SPL meeting. Jan. 2012.
  • 2 "CORDIC algorithm, " SPL meeting. Dec. 2011.
  • 1 "Efficient method of Trigonometric function processing, " SPL meeting. Nov. 2011.

Awards

  • 2012 Wearable Computer Contest - Silver Award (Hosted by Ministry of Knowledge Economy(MKE)).

Skills

-EDA tools: ModelSim, ORCAD, Multisim, Xilinx ISE, Quartus, NC-Verilog, Nanosim
-FPGA Prototyping: Altera, Xilinx, Cadence
-Analysis Language: MATLAB
-High-level Computer Language: C, C++, Assembly
-Microprocessor: Atmega, 80C51, PIC

Courses

Circuit Theory, Electromagnetics, Electronic Circuit Experiment, Digital Fundamentals, Fundamental Semiconductor Engineering, Circuit Designs,
Programming Language Practice, Information and Communication Engineering, Microprocessor, Mobile Communication, Sensor Engineering,
Integrated Circuit Design, Network Programming Practice, Electronic Application, Electronic Materials, Control Engineering, Digital System Design,
Electronic Circuit, Solid State Device, Signals and Systems, Operating System, Image Processing, Computer Architecture, TCP/IP Internet Protocol.