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Jaeseong Kim

Jaeseong Kim

Dept. of Electronic and Information Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA

Education & Experiences

2026.03 - present, Graduate Student, Dept. of Electronic, Seoul National University of Science and Technology.
2024.05 - present, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.
2026.02 - B.S. in Electronic Engineering, Seoul National University of Science and Technology.
2020.03 - 2026.02, Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.

Research Interests

Digital System Design
Processor Architecture
Hardware Accelerator for AI

Projects

  1. Development of real time monitering sensor for gas pipe
    Ministry of Trade, Industry and Energy, Korea, 2022-2026.
  2. Development for Processing Software on AI Semiconductor Devices
    Ministry of Science and ICT, Korea, 2022-2029.

Publications

International Journals

  1. 1

International Conferences

  1. 2
    A Pipelined Multi-Bank GEMM Accelerator for Memory Bottleneck Mitigation
    Dayoung Lee, Chaebin Lee, Jaeseong Kim, Seung Eun LEE
    International Conference on Parallel Architectures and Compilation Techniques (PACT src) · Irvine, CA · Sep. 2025
  2. 1

Korean Journals

  1. 1

Korean Conferences

  1. 3
    Analysis of Training Dataset Construction Methods for Improving the Performance of the Edge AI Processor
    이채빈, 김재성, 이다영, 안성모, 박정민, 이승은
    Korean Association Data Science, Spring Joint Academic Conference (KADS) · Yeosu · Jun. 2025
  2. 2
    FP8-FP16 혼합 정밀도 기반의 MobileNetV1 추론 성능 분석
    김재성, 이채빈, 이다영, 이승은
    The Institute of Electronics and Information Engineers · May 2025
  3. 1

Copyrights

Copyrighted Softwares

  1. 5
    인공지능 프로세서(Processor)의 효과적인 활용을 위한 그래픽 사용자 인터페이스(Graphic User Interface) 기반 시뮬레이터(Simulator)
    Registration No. C-2025-046318, Nov. 2025, Korea (right owned by SeoulTech)
  2. 4
    다중 엣지(Edge) 도메인(Domain) 내 추론정확도 기반 우선순위 판단 시뮬레이터(Simulator)
    Registration No. C-2025-046317, Nov. 2025, Korea (right owned by SeoulTech)
  3. 3
    인텔리노(Intellino): 경량 엣지(Edge) 인공지능 프로세서(Processor)
    Registration No. C-2025-045291, Oct. 2025, Korea (right owned by SeoulTech)
  4. 2
    캔(CAN) 통신 중재를 이용한 우선순위 기반 위험도 평가 시스템(System)
    Registration No. C-2025-045289, Oct. 2025, Korea (right owned by SeoulTech)
  5. 1
    내부 패킷(packet) 구성 자동화를 활용한 텐서(Tensor)곱 연산 가속 소프트웨어
    Registration No. C-2025-045301, Oct. 2025, Korea (right owned by SeoulTech)

Chips

2025

A Networked Processor Array based on Heterogeneous Computing Units for AI Acceleration
Seongmo An, Joungmin Park, Jongwon Oh, Jaeseong Kim, Seung Eun LEE
Tech
Samsung 28nm LPP
Tape-out
2025.07.07
Freq
100MHz
Core
4mm x 4mm
Power
1.2V

Awards

Skills

- High-level Programming Language: Python
- Hardware Description Language: Verilog
- FPGA Design Tools: Quartus II
- EDA Tools: ModelSim

Training

2026.07.01-07.03 [IDEC] GPU 프로그래밍의 핵심: CUDA로 배우는 병렬 처리 기술
2025.12.06 [NVIDIA] 트랜스포머 기반 자연어 처리 애플리케이션 구축
2025.07.28-08.03 [IDEC] Cell-Based Chip Design Flow 교육
2025.06.16-06.17 [Siemens] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
2025.01.14-01.16 [IDEC] System Verilog를 이용한 검증 방법론

Graduate Courses

SoC Design Methodology | Network-on-Chip Design | Data Compression | Adavanced DSP Architecture

Undergraduate Courses

Digital System Design | Computer Architechture | Micro Processor | Application of Micro Processor
Computer Programming(C Programming) | Mobile Programing | Machine Learning | Deep Learning
Logic Circuit | Control Engineering | Control Systems Engineering
Electronic Circuits | Electronic Circuits2 | Signal System
Engineering Mathmatics | Electromagnetics | Circuit Theory
Microwave Engineering | Semiconductor Engineering | Operating System | Internet Protocol