← Alumni
Seongmo An

Seongmo An (2026)

Dept. of Electronic Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA

Education & Experiences

2026.02 - present, Engineer, SoC Team, DeepX
2026.02, M.S. in Electronic Engineering, The Graduate School, Seoul National University of Science and Technology.
Thesis Title: Research on NoC Fabric Architecture Design and Packet Latency Optimization for High-Performance SoCs.
2024.02, B.S. in Electronic Engineering, Seoul National University of Science and Technology.
2022.05 - 2026.02, Research Assistant, Computer Architecture Lab, Seoul National University of Science and Technology.

Research Interests

Multi/Many-Core Processor
Network-on-Chip
Computer Architecture
Hardware Accelerator for AI
Approximate Computing
Memory-Centric Computing

Projects

  1. Next-Generation System Semiconductor Design Engineer Development Program
    Ministry of Trade, Industry and Energy, Korea, 2024-2025.
  2. Development of real time monitoring sensor for gas pipe
    Ministry of Trade, Industry and Energy, Korea, 2023-2025.
  3. Development of DRAM PIM semiconductor technology for enhanced computing function for edge
    Ministry of Science and ICT, Korea, 2022-2025.
  4. Development for Processing Software on AI Semiconductor Devices
    Ministry of Science and ICT, Korea, 2022-2025.
  5. Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo)
    Ministry of Trade, Industry and Energy, Korea, 2022-2023.

Publications

International Journals

  1. 5
    An Accelerated Block Searching Approach in A* for Autonomous Mobile Robots
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) · Vol. 72 · pp. 7516-7528 · Jun. 2025
  2. 4
  3. 3
  4. 2
  5. 1

International Conferences

  1. 9
    Latency-Aware QoS Optimization of XY-YX Routing in NoCs via Analytical Latency Estimation
    The 3rd Workshop on Computer Architecture Modeling and Simulation co-located with Micro (CAMS) · Seoul · Oct. 2025
  2. 8
  3. 7
    Analysis of the Impact of LFSR Architecture on Accuracy of Stochastic Computing Processors
    International Symposium on Quality Electronic Design (ISQED) · California · Apr. 2025
  4. 6
    Flexible NTT/iNTT Accelerator Based on Montgomery Reduction
    International Conference on Consumer Electornics (ICCE) · Las Vegas, NV · Jan. 2025
  5. 5
    Point Cloud Clustering System with DBSCAN Algorithm for Low-Resolution LiDAR
    International Conference on Consumer Electronics (ICCE) · Las Vegas · Jan. 2024
  6. 4
    PIMCoSim: HW/SW Co-Simulator for Exploring Processing In Memory Architectures
    ACM Student Research Competition (ACM SRC @PACT) · Vienna · Oct. 2023
  7. 3
    An Approach for Lightweight and Error-Tolerant Binocular Stereo Matching with Stochastic Computing
    ACM Student Research Competition (ACM SRC @MICRO) · Toronto · Oct. 2023
  8. 2
  9. 1
    RF2P: a Lightweight RISC Processor Optimized for Rapid Migration from IEEE-754 to Posit
    ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED) · Vienna · Aug. 2023

Korean Journals

  1. 1
    A Design of a Communication Processor for Implementing Local Network in Zonal Architecture
    Journal of Integrated Circuits and Systems (JICAS) · Vol. 9 · No. 4 · Sep. 2023

Korean Conferences

  1. 4
    Analysis of Training Dataset Construction Methods for Improving the Performance of the Edge AI Processor
    Korean Association Data Science, Spring Joint Academic Conference (KADS) · Yeosu · Jun. 2025
  2. 3
    Bird Repellent System based on Embedded AI Processor
    2025년 반도체공학회 동계종합학술대회 · Jan. 2025
  3. 2
    임베디드 인공지능 프로세서에 기반한 안면 인식 시스템
    Korea Institute of information and Communication Engineering (한국정보통신학회 춘계종합학술대회) (KIICE) · May 2023
  4. 1
    Library Management System based on Embedded AI Accelerator
    Institute of Semiconductor Engineers, The 5th General Conference (ISE) · Seoul · Dec. 2022

Copyrights

Application

  1. 2
    온칩 네트워크에서의 패킷 전송 지연 추정 및 경로 최적화 장치 및 방법
    DEVICE AND METHOD FOR ESTIMATING PACKET TRANSMISSION LATENCY AND OPTIMIZING ROUTING IN ON-CHIP NETWORKS
    Application No. 10-2025-0199098, Dec. 2025, Korea (right owned by SeoulTech)
  2. 1
    라이다의 점군 데이터에 대한 클러스터링 방법 및 장치
    CLUSTERING METHODS AND DEVICES FOR LIDAR POINT CLOUD DATA
    Application No. 10-2024-0151382, Oct. 2024, Korea (right owned by SeoulTech)

Copyrighted Softwares

  1. 5
    NoC(Network-on-Chip) XY-YX 라우팅(Routing) 최적화 분석 프로그램(Program)
    Registration No. C-2025-045051, Oct. 2025, Korea (right owned by SeoulTech)
  2. 4
    칩(Chpi) 내 통신망 경로 제어기 동작 검증 프로그램(Program)
    Registration No. C-2025-045302, Oct. 2025, Korea (right owned by SeoulTech)
  3. 3
    고정식 라이다(LiDAR)의 특성을 이용한 격자 밀도 기반 3차원 점군 클러스터링(Clustering) 가속기
    Registration No. C-2024-047141, Nov. 2024, Korea (right owned by SeoulTech)
  4. 2
    확률 기반 연산 프로세서(Processor)에서 동작하는 스테레오 매칭(Stereo Matching) 프로그램
    Registration No. C-2023-023702, May. 2023, Korea (right owned by SeoulTech)
  5. 1
    차량용 LIN (Local Interconnect Network) 제어기
    Registration No. C-2023-023701, May. 2023, Korea (right owned by SeoulTech)

Chips

2026

A Networked Processor Array Supporting High-Bandwidth Host Interface
Jinyeol Kim, Raehyeong Kim, Jongwon Oh, Dayoung Lee, Seongmo An, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2026.03.23
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2025

A Networked Processor Array based on Heterogeneous Computing Units for AI Acceleration
Seongmo An, Joungmin Park, Jongwon Oh, Jaeseong Kim, Seung Eun LEE
Tech
Samsung 28nm LPP
Tape-out
2025.07.07
Freq
100MHz
Core
4mm x 4mm
Power
1.2V
A Low-Power Point Cloud Clustering System with a DBSCAN Clustering Accelerator based on Cortex-M0
Sangho Lee, Seongmo An, Raehyeong Kim, Jongwon Oh, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2025.02.02
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2024

An Error Correcting Code Encoder Utilizing Orthogonal Latin Square Code for HBM Application
Yueri Jeong, Sangho Lee, Seongmo An, Jinyeol Kim, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2024.09.09
Freq
50M/200MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2023

A Network System Processor for Next-Generation Robots based on Cortex-M3
Kwanghyun Go, Soohee Kim, Yueri Jeong, Seongmo An, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2023.11.27
Freq
50M/200MHz
Core
4mm x 4mm
Power
1.1V/1.8V

Chip Design Contest

  • 2. "A Network System Processor for Next-Generation Robots based on Cortex-M0",
    Kwanghyun Go, Yue Ri jeong, Seongmo An, Jongwon Oh and Seung Eun Lee,
    2025 IEEE International SoC Design Conference (ISOCC), Oct. 2025.
  • 1. "A Local Interconnect Network Communication Processor based on Cortex-M0 for Automotive Devices",
    Kwonneung Cho, Jeongeun Kim, Hyun Woo Oh, Seong Mo An and Seung Eun Lee,
    2023 Korean Conference on Semiconductors (한국반도체학술대회, KCS), Feb. 2023.

ACM Student Research Competition

Presentation

  • 3. "Analysis of the Impact of LFSR Architecture on Accuracy of Stochastic Computing Processors"
    Seongmo An, Sangho Lee, Jinyoung Shin, Yueri Jeong and Seung Eun Lee,
    The 26th International Symposium on Quality Electronic Design (ISQED 2025), San Francisco, US, Apr. 2025.
  • 2. "Flexible NTT/iNTT Accelerator Based on Montgomery Reduction"
    Jinyeol Kim, Jinyoung Shin, Seongmo An, Chaebin Lee, Dayoung Lee and Seung Eun Lee,
    The 2025 IEEE International Conference on Consumer Electronics (ICCE 2025), Las Vegas, US, Jan. 2025.
  • 1. "An Approach for Lightweight and Error-Tolerant Binocular Stereo Matching with Stochastic Computing"
    Seongmo An, Sangho Lee, Jinyeol Kim and Seung Eun Lee,
    2023 ACM Student Research Competition (SRC) @ MICRO 2025, Toronto, Canada, Nov. 2023.

Awards

Skills

- High-level Programming Language: C/C++, Java, Python
- Hardware Description Language: Verilog HDL, SystemC
- Analysis Language: MATLAB
- FPGA Design Tool: Quartus II, VIVADO
- Functional Verification Tool: VCS, ModelSim, Verdi
- Circuit Entry Tool: Virtuoso Schematic Editor
- EDA Tool: Design Compiler, IC Compiler II, PrimeTime, Formality, StarRC, Calibre DRC/LVS, Virtuoso Layout Suite

Training

2025.09.17-09.19 [IDEC] [Synopsys] Block-level Auto P&R utilizing IC Compiler II
2025.06.16-06.17 [IDEC] [Siemens EDA] Catapult High Level Synthesis Training for Implementation/Generation of Verilog RTL from C/C++ Algorithm Designs
2025.04.10-04.11 [IDEC] [Synopsys] VCS/Verdi Training for Logic Design Simulation & Efficient Debugging Methodology
2024.11.21-11.22 [KAIST AI-PIM] Samsung HBM PIM Theory and Practice
2024.11.13-11.15 [IDEC] Xilinx ZYNQ Device Design
2024.11.11-11.13 [KAIST AI-PIM] SK Hynix AiM(Accelerator-in-Memory) Theory and Practice
2024.05.08-05.10 [IDEC] ARM Cortex-M Processor-based FreeRTOS Utilization
2023.05.24-05.25 [IDEC] Design and Verification of AMBA AXI and AXI-stream
2023.05.15-05.19 [IDEC] Researcher Training : Cell-based Chip Design Flow
2023.02.20-02.22 [IDEC] Algebraic Error Correction Codes
2023.02.06-02.10 [KIRD] Basic Semiconductor Design Curriculum - PCB Artwork with OrCAD PCB Editor(Allegro)
2022.11.28-11.29 [IDEC] Deep-Learning Processing Unit Design and Implementation
2022.08.16-08.25 [Infineon] Professional Training Course for Automotive Semiconductor
2022.08.08-08.10 [Infineon] Basic Training Course for Automotive Semiconductor

Graduate Courses

Advanced Machine Learning, Design of Network on Chips
SoC Design Methodology, Resilient Processor Design
Advanced Semiconductor, Advanced Computer Architecture, Advanced Computer Vision

Undergraduate Courses

Digital System Design, Control Systems Engineering, Logic Circuit
Electronic Circuits, Electromagnetics, Semiconductor Engineering
Computer Programming(C Programming), Computer Architecture
Microprocessors, Engineering Mathmatics, Circuit Theory
Signal System, Electrical and Electronic Experiment
Mobile Programming(Java Programming), Machine Learning, Operating System
Capstone Design (1), Capstone Design (2)