← Alumni
Jinyoung Shin

Jinyoung Shin (2026)

Dept. of Electronic Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA

Education & Experiences

2026.02 - present, Engineer, MangoBoost.
2026.02, M.S. in Electronic Engineering, The Graduate School, Seoul National University of Science and Technology.
Thesis Title: "Block Searching-Based Path Planning Algorithm and Hardware Architecture for Embedded Systems"
2024.02, B.S. in Electronic and Information Engineering, Seoul National University of Science and Technology.
2022.07 - 2026.02, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.
2018.03 - 2024.02, Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.

Research Interests

Hardware/Software Co-Design
Digital System Design
In-Memory Computing
System-on-Chip Design

Projects

  1. Development of real time monitoring sensor for gas pipe
    Ministry of Trade, Industry and Energy, Korea, 2022-2026.
  2. Development of DRAM PIM semiconductor technology for enhanced computing function for edge
    Ministry of Science and ICT, Korea, 2022-2025.
  3. Development for Processing Software on AI Semiconductor Devices
    Ministry of Science and ICT, Korea, 2022-2029.
  4. Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo)
    Ministry of Trade, Industry and Energy, Korea, 2021-2023.

Publications

International Journals

  1. 3
    An Accelerated Block Searching Approach in A* for Autonomous Mobile Robots
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) · Vol. 72 · pp. 7516-7528 · Jun. 2025
  2. 2
  3. 1

International Conferences

  1. 8
    Latency-Aware QoS Optimization of XY-YX Routing in NoCs via Analytical Latency Estimation
    The 3rd Workshop on Computer Architecture Modeling and Simulation co-located with Micro (CAMS) · Seoul · Oct. 2025
  2. 7
  3. 6
    Analysis of the Impact of LFSR Architecture on Accuracy of Stochastic Computing Processors
    International Symposium on Quality Electronic Design (ISQED) · California · Apr. 2025
  4. 5
    Flexible NTT/iNTT Accelerator Based on Montgomery Reduction
    International Conference on Consumer Electornics (ICCE) · Las Vegas, NV · Jan. 2025
  5. 4
    PIMCoSim: HW/SW Co-Simulator for Exploring Processing In Memory Architectures
    ACM Student Research Competition (ACM SRC @PACT) · Vienna · Oct. 2023
  6. 3
    JPS Accelerator Based Global Path Planning Processor for Autonomous Mobile Robots
    2nd Workshop on Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture) (MICRO) · Toronto · Oct. 2023
  7. 2
  8. 1
    AI Processor based Data Correction for Enhancing Accuracy of Ultrasonic Sensor
    International Conference on Artificial Intelligence Circuits and Systems (AICAS) · Hangzhou · Jun. 2023

Korean Conferences

  1. 1

Copyrights

Copyrighted Softwares

  1. 4
    NoC(Network-on-Chip) XY-YX 라우팅(Routing) 최적화 분석 프로그램(Program)
    Registration No. C-2025-045051, Oct. 2025, Korea (right owned by SeoulTech)
  2. 3
    전역 경로 탐색을 위한 BSA* (Block Searching A*, 블록 탐색 에이스타) 알고리즘 (Algorithm) 분석 프로그램 (Program)
    Registration No. C-2024-047150, Nov. 2024, Korea (right owned by SeoulTech)
  3. 2
    인공지능 가속기 성능 최적화를 위한 명령어 디코더 (decoder)
    Registration No. C-2024-047139, Nov. 2024, Korea (right owned by SeoulTech)
  4. 1
    인공지능 가속기를 활용한 초음파 센서 데이터 정확도 향상 분석 프로그램
    Registration No. C-2023-023355, May. 2023, Korea (right owned by SeoulTech)

Chips

2025

A Reconfigurable AI Processor Executing Lightweight Algorithms for Sequential Data Applications
Raehyeong Kim, Jinyoung Shin, Jinyeol Kim, Dayoung Lee, Joungmin Park, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2025.09.25
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2024

Convolution-based Feature Extractor Equipped with an Improved Systolic Array Architecture
Joungmin Park, Sangho Lee, Jinyoung Shin, Raehyeong Kim, Seung Eun LEE
Tech
Samsung 28nm LPP
Tape-out
2024.07.18
Freq
50M/200MHz
Core
4mm x 4mm
Power
1.2V

Workshop

Student Research Competition

Presentation

Awards

Skills

- High-level Programming Language: C Programming, Python, JAVA
- Hardware Description Language: Verilog
- Analysis Language: MATLAB
- FPGA Design Tools: Quartus II, Vivado
- EDA Tools: ModelSim, Vivado

Training

2024.11.11, 2024.11.13 [KAIST AI-PIM] SK Hynix AiM(Accelerator in Memory) Principles and Practice
2024.05.08-05.10 [IDEC] Utilizing FreeRTOS with ARM Cortex-M Processor
2023.05.24-05.25 [IDEC] Design and Verification of AMBA AXI and AXI-Stream
2023.05.15-05.19 [IDEC] Cell-Based Chip Design Flow Training
2023.02.20-02.22 [IDEC] Algebraic Error-Correcting Codes
2023.02.06-02.10 [KIRD] Basic Semiconductor Design Curriculum - PCB Artwork with OrCAD PCB Editor(Allegro)
2022.11.28-11.29 [IDEC] Deep-Learning Processing Unit Design and Implementation
2022.08.16-08.25 [Infineon] Professional Training Course for Automotive Semiconductor, Korea Semiconductor Industry Association
2022.08.08-08.10 [Infineon] Basic Training Course for Automotive Semiconductor, Korea Semiconductor Industry Association

Graduate Courses

Special Topics on Machine Learning, Special Topic in Network-on-Chip,
Probability and Random Process, Resilient Processor Design, SoC Design Methodology,
Advanced Artificial Intelligence Processor, Power Management IC Design based on CMOS Technology

Undergraduate Courses

Digital System Design, Control Systems Engineering, Logic Circuit,
Electronic Circuits, Electromagnetics, Semiconductor Engineering, Digital Signal Processing,
Computer Programming(C Programming), Microprocessors, Engineering Mathmatics,
Circuit Theory, Signal System, Electrical and Electronic Experiment,
Computer Architecture, Mobile Programming(JAVA Programming),
Operating System, Machine Learning, Capstone Design (1), Capstone Design(2)