Education & Experiences
2026.02 - present, Engineer, Agency for Defense Development.
2026.02, M.S. in Electronic Engineering, The Graduate School, Seoul National University of Science and Technology.
2024.02, B.S. in Electronic Engineering, Seoul National University of Science and Technology.
2022.07 - 2026.02, Research Assistant, Computer Architecture Lab, Seoul National University of Science and Technology.
2019.03 - 2024.02, Undergraduate Student, Dept. of Electronic Engineering, Seoul National University of Science and Technology.
2017.03 - 2019.02, Undergraduate Student, Dept. of Energy Engineering, Dankook University.
2026.02, M.S. in Electronic Engineering, The Graduate School, Seoul National University of Science and Technology.
2024.02, B.S. in Electronic Engineering, Seoul National University of Science and Technology.
2022.07 - 2026.02, Research Assistant, Computer Architecture Lab, Seoul National University of Science and Technology.
2019.03 - 2024.02, Undergraduate Student, Dept. of Electronic Engineering, Seoul National University of Science and Technology.
2017.03 - 2019.02, Undergraduate Student, Dept. of Energy Engineering, Dankook University.
Research Interests
Hardware Architecture for Neural Processing, Computer Architecture, Embedded System, System-on-Chip Design, Memory-Centric Computing, VLSI Implementation, Parallel Processing
Projects
- Next-Generation System Semiconductor Design Engineer Development ProgramMinistry of Trade, Industry and Energy, Korea (2024 - 2025)
- Development of real time monitoring sensor for gas pipeMinistry of Trade, Industry and Energy, Korea (2023 - 2025)
- Development for Processing Software on AI Semiconductor DevicesMinistry of Science and ICT, Korea (2022 - 2025)
- Development of DRAM PIM semiconductor technology for enhanced computing function for edgeMinistry of Science and ICT, Korea (2022 - 2025)
- ECC for high-speed SCM based PIMKorea Electronics Technology Institute, Korea (2022 - 2024)
- Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo)Ministry of Trade, Industry and Energy, Korea (2021 - 2023)
Publications
International Journals
- 9 Real-Time True Wireless Stereo Wearing Detection Using a PPG Sensor with Edge AIElectronics · Vol. 14 · No. 3911 · Sep. 2025
- 8 An Accelerated Block Searching Approach in A* for Autonomous Mobile RobotsIEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) · Vol. 72 · pp. 7516-7528 · Jun. 2025
- 7 Hardware Accelerator for Approximation-Based Softmax and Layer Normalization in TransformersElectronics · Vol. 14 · No. 2337 · Apr. 2025
- 6 SEAM: A synergetic energy-efficient approximate multiplier for application demanding substantial computational resourcesIntegration-the VLSI Journal · Vol. 101 · No. 102337 · Mar. 2025
- 5 Grid-Based DBSCAN Clustering Accelerator for LiDAR's Point CloudElectronics · Vol. 13 · No. 3395 · Aug. 2024
- 4 DL-Sort: A Hybrid Approach to Scalable Hardware-Accelerated Fully-Streaming SortingIEEE Transactions on circuits and systems II: Express briefs (TCAS-II) · Vol. 71 · No. 5 · 2024
- 3 Accelerating Strawberry Ripeness Classification Using a Convolution-Based Feature Extractor along with an Edge AI ProcessorJoungmin Park, Jinyoung Shin, Raehyeong Kim, Seongmo An, Sangho Lee, Jinyeol Kim, Jongwon Oh, Youngwoo Jeong, Soohee Kim, Yueri Jeong, Seung Eun LEEElectronics · Vol. 13 · No. 344 · Jan. 2024
- 2 Intelligent Monitoring System with Privacy Preservation based on Edge AIMicromachines · Vol. 14 · No. 9 · Sep. 2023
- 1 Photoplethysmography-Based Distance Estimation for True Wireless StereoMicromachines · Vol. 14 · No. 2 · Jan. 2023
International Conferences
- 5 WPU: A Pipelined WebAssembly Processing Unit for Embedded IoT Systems31st Asia and South Pacific Design Automation Conference (ASP-DAC) · Jan. 2026
- 4 An Accelerated Block Searching Approach in A* for Autonomous Mobile RobotsInternational Symposium on Circuits And Systems (ISCAS) · London · May 2025
- 3 JPS Accelerator Based Global Path Planning Processor for Autonomous Mobile Robots2nd Workshop on Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture) (MICRO) · Toronto · Oct. 2023
- 2 Continuous Convolution Accelerator with Data Reuse Based on Systolic ArchitectureInternational SoC Design Conference (ISOCC) · Jeju · Oct. 2023
- 1 Embedded Monitoring System for Preventing Lonely Death based on Edge AIInternational Conference on Consumer Electronics (ICCE) · Las Vegas · Jan. 2023
Korean Journals
- 1 FPGA-Based Digital Controller for High-Speed CAN Flexible Data-Rate CommunicationJournal of Integrated Circuits and Systems (JICAS) · 2026
Korean Conferences
- 8
- 7
- 6
- 5
- 4 CNN Preprocessing Based Embedded AI Strawberry ClassifierKorean Conference on Semiconductors (KCS) · Gyeongju · Jan. 2024
- 3
- 2 Matrix Computation Accelerator based on Systolic Array for Convolution ProcessingInstitute of Electronics and Information Engineers, Summer Annual Conference (IEIE) · Jeju · Jun. 2023
- 1 Library Management System based on Embedded AI AcceleratorInstitute of Semiconductor Engineers, The 5th General Conference (ISE) · Seoul · Dec. 2022
Copyrights
Application
- 1 이미지 분류 방법 및 장치METHOD AND APPARATUS FOR CLASSIFYING IMAGESApplication No. 10-2024-0167572, Nov. 2024, Korea (right owned by SeoulTech)Application No. PCT/KR2024/019962, Dec. 2024, PCT (right owned by SeoulTech)Application No. 24946574.1, Jan. 2026, Europe (right owned by SeoulTech)Application No. 19/504,172, Jan. 2026, USA (right owned by SeoulTech)Application No. 2026-504690, Jan. 2026, Japan (right owned by SeoulTech)
Copyrighted Softwares
- 5 다중 엣지(Edge) 도메인(Domain) 내 추론정확도 기반 우선순위 판단 시뮬레이터(Simulator)Registration No. C-2025-046317, Nov. 2025, Korea (right owned by SeoulTech)
- 4 캔(CAN) 통신 중재를 이용한 우선순위 기반 위험도 평가 시스템(System)Registration No. C-2025-045289, Oct. 2025, Korea (right owned by SeoulTech)
- 3 내부 패킷(packet) 구성 자동화를 활용한 텐서(Tensor)곱 연산 가속 소프트웨어Registration No. C-2025-045301, Oct. 2025, Korea (right owned by SeoulTech)
- 2 광혈류 측정법을 이용한 TWS(티더블유에스) 착용감지 프로그램(program)Registration No. C-2024-049980, Dec. 2024, Korea (right owned by SeoulTech)
- 1 인공지능 가속기 성능 최적화를 위한 명령어 디코더 (decoder)Registration No. C-2024-047139, Nov. 2024, Korea (right owned by SeoulTech)
Chips
2025
A Reconfigurable AI Processor Executing Lightweight Algorithms for Sequential Data Applications
Raehyeong Kim, Jinyoung Shin, Jinyeol Kim, Dayoung Lee, Joungmin Park, Seung Eun LEE
- Tech
- Samsung 28nm FD-SOI
- Tape-out
- 2025.09.25
- Freq
- 100MHz
- Core
- 4mm x 4mm
- Power
- 1.1V/1.8V
A Networked Processor Array based on Heterogeneous Computing Units for AI Acceleration
Seongmo An, Joungmin Park, Jongwon Oh, Jaeseong Kim, Seung Eun LEE
- Tech
- Samsung 28nm LPP
- Tape-out
- 2025.07.07
- Freq
- 100MHz
- Core
- 4mm x 4mm
- Power
- 1.2V
2024
A Internal Network IP for Next-Generation Robots with SPI
Kwanghyun Go, Soohee Kim, Jongwon Oh, Joungmin Park, Seung Eun LEE
- Tech
- DBHitek 180nm BCDMOS
- Tape-out
- 2024.12.06
- Freq
- 50M
- Core
- 5mm x 2.5mm
- Power
- 5V
Convolution-based Feature Extractor Equipped with an Improved Systolic Array Architecture
Joungmin Park, Sangho Lee, Jinyoung Shin, Raehyeong Kim, Seung Eun LEE
- Tech
- Samsung 28nm LPP
- Tape-out
- 2024.07.18
- Freq
- 50M/200MHz
- Core
- 4mm x 4mm
- Power
- 1.2V
Workshop
- 1. "JPS Accelerator Based Global Path Planning Processor for Autonomous Mobile Robots",
Jinyoung Shin, Joungmin Park, Jinyeol Kim, Yue Ri Jeong, and Seung Eun Lee
2nd Workshop on Robotics Acceleration with Computing Hardware (RoboARCH), Toronto, Canada, Oct. 2023.
(Co-located with the IEEE/ACM International Symposium on Microarchitecture (MICRO))
Presentations
- 5. "CoFEx : Convolution-based Feature Extractor Equipped with an Improved Systolic Array Architecture", "[View]"
Joungmin Park, Sangho Lee, Jinyoung Shin, Raegyeong Kim and Seung Eun Lee
ISOCC 2025, Chip Design Contest, Oct.2025. - 4. "Configurable End-toEnd CNN Accelerator for Real-Time Age Estimation on FPGA", "[View]"
김래형, 박정민 이승은,
반도체공학회 하계종합학술대회, Live 데모 경진대회, Jul.2025. - 3. "Multi-Stage Scalable Convolution-based Feature Extractor for the Memory-Centric Computing", "[View]"
Joungmin Park, Seong Mo An and Seung Eun Lee,
IEEE Seoul Section Student Paper Contest, Dec.2024. - 2. "확장 가능한 임베디드 AI 시스템", "[View]"
박정민, 안성모, 이상호, 이승은,
ICT Challenge 2024, 일상에 스며드는 디지털 혁신, Sep.2024. - 1. "합성곱 가속기를 이용한 AI 시스템 반도체", "[View]"
박정민, 김래형, 신진영, 김수희, 이승은,
ICT Challenge 2023, 디지털로 펼쳐갈 미래로의 도전, Sep.2023.
Awards
- 2025.07.15. 반도체공학회 하계종합학술대회 Live 데모 경진대회 - 우수상
Topic: Configurable End-toEnd CNN Accelerator for Real-Time Age Estimation on FPGA
반도체공학회 하계종합학술대회 - 2025.06.13. The Spring Annual Conference of the Korean Data Science Society - Honorable Mention Award
Topic: Analysis of Training Dataset Construction Methods for Improving the Performance of the Edge AI Processor
The Institute of Korean Data Science Society - 2024.12.07. IEEE Seoul Section Student Paper Contest - Bronze Award
Topic: Multi-Stage Scalable Convolution-based Feature Extractor for the Memory-Centric Computing
IEEE Seoul Section Best Student Paper
Skills
- Hardware Description Language: Verilog-HDL
- High-level Programming Language: C/C++, Python
- Analysis Language: System Verilog
- FPGA Design Tools: Vivado, Quartus II, ModelSim
- EDA Tools: Design Compiler, IC Compiler II, PrimeTime, VCS, Verdi, Formality, StarRC, Calibre DRC/LVS, Virtuoso Layout Suite
Training
2025.09.17-09.19 [IDEC, Synopsys] IC Compiler II를 활용한 Block-level Auto P&R
2025.07.07-07.08 [IDEC, Siemens EDA] CUDA 기반 GPU 프로그래밍 기초
2025.06.16-06.17 [IDEC, Siemens EDA] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
2025.05.28-06.01 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
2025.04.10-04.11 [IDEC, Synopsys] 반도체 Logic설계 시뮬레이션 & 효율적인 디버깅 방법론을 위한 VCS/Verdi Training
2025.01.08-01.10 [IDEC] Cell-Based Chip Design Front-End 교육(칩설계)
2025.01.06-01.07 [IDEC] 인공지능 기초 및 AI 반도체 구조
2024.05.30-05.31 [IDEC] AMBA AXI와 AXI-Stream 설계와 검증
2023.08.07-08.09 [IDEC, Synopsys] SystemVerilog 검증 환경 만들기
2023.05.15-05.19 [IDEC] Cell-Based Chip Design Flow 교육
2023.04.24-04.25 [IDEC, Siemens EDA] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
2023.02.16-02.16 [IDEC] 인공지능 가속 프로세서
2023.02.06-02.10 [KIRD] Basic Semiconductor Design Curriculum - PCB Artwork with OrCAD PCB Editor(Allegro)
2022.11.28-11.29 [IDEC] 인공지능반도체 설계: Deep-Learning Processing Unit Design and Implementation
2022.08.16-08.25 [KSIA, Infineon] 인피니언 연계 차량용 반도체 전문인력 양성과정(심화과정)
2022.08.08-08.10 [KSIA, Infineon] 인피니언 연계 차량용 반도체 전문인력 양성과정(기본과정)
2022.02.24-02.24 [IDEC] GPU 아키텍쳐와 CUDA 프로그래밍 모델
2022.02.07-02.09 [IDEC] Intel FPGA를 이용한 Verilog
2022.01.12-01.13 [IDEC] 임베디드 프로세서 구조의 이해
2022.01.05-01.06 [IDEC] Computer arithmetic and VLSI signal Processing
2021.12.27-12.28 [IDEC] 디지털 SoC 구조
2021.12.01-12.02 [IDEC] 인공지능반도체(DPU) 설계
2021.11.22-11.23 [IDEC] GPU 하드웨어 구조 및 활용
2025.07.07-07.08 [IDEC, Siemens EDA] CUDA 기반 GPU 프로그래밍 기초
2025.06.16-06.17 [IDEC, Siemens EDA] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
2025.05.28-06.01 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
2025.04.10-04.11 [IDEC, Synopsys] 반도체 Logic설계 시뮬레이션 & 효율적인 디버깅 방법론을 위한 VCS/Verdi Training
2025.01.08-01.10 [IDEC] Cell-Based Chip Design Front-End 교육(칩설계)
2025.01.06-01.07 [IDEC] 인공지능 기초 및 AI 반도체 구조
2024.05.30-05.31 [IDEC] AMBA AXI와 AXI-Stream 설계와 검증
2023.08.07-08.09 [IDEC, Synopsys] SystemVerilog 검증 환경 만들기
2023.05.15-05.19 [IDEC] Cell-Based Chip Design Flow 교육
2023.04.24-04.25 [IDEC, Siemens EDA] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
2023.02.16-02.16 [IDEC] 인공지능 가속 프로세서
2023.02.06-02.10 [KIRD] Basic Semiconductor Design Curriculum - PCB Artwork with OrCAD PCB Editor(Allegro)
2022.11.28-11.29 [IDEC] 인공지능반도체 설계: Deep-Learning Processing Unit Design and Implementation
2022.08.16-08.25 [KSIA, Infineon] 인피니언 연계 차량용 반도체 전문인력 양성과정(심화과정)
2022.08.08-08.10 [KSIA, Infineon] 인피니언 연계 차량용 반도체 전문인력 양성과정(기본과정)
2022.02.24-02.24 [IDEC] GPU 아키텍쳐와 CUDA 프로그래밍 모델
2022.02.07-02.09 [IDEC] Intel FPGA를 이용한 Verilog
2022.01.12-01.13 [IDEC] 임베디드 프로세서 구조의 이해
2022.01.05-01.06 [IDEC] Computer arithmetic and VLSI signal Processing
2021.12.27-12.28 [IDEC] 디지털 SoC 구조
2021.12.01-12.02 [IDEC] 인공지능반도체(DPU) 설계
2021.11.22-11.23 [IDEC] GPU 하드웨어 구조 및 활용
Courses
Digital System Design, Computer Programming(C Programming),
Engineering Mathmatics, Computer Programming, Electromagnetics,
Electronic Circuits, Logic Circuit, Semiconductor Engineering,
Microprocessors Design, Machine Learning,
Circuit Theory, Signal System, Mobile Communication Engineering,
Computer Architecture, Mobile Programming(Java Programming)
Engineering Mathmatics, Computer Programming, Electromagnetics,
Electronic Circuits, Logic Circuit, Semiconductor Engineering,
Microprocessors Design, Machine Learning,
Circuit Theory, Signal System, Mobile Communication Engineering,
Computer Architecture, Mobile Programming(Java Programming)