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Raehyeong Kim

Raehyeong Kim

Dept. of Electronic Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA

Education & Experiences

2026.08. - present, Visiting Graduate Student, AI Semiconductor Systems Architecture Program, University of Illinois Urbana-Champaign (UIUC).
2025.03. - present, Graduate Student, Dept. of Electronic, Seoul National University of Science and Technology.
2023.03. - 2025.02., Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.
2019.03. - 2025.02., Undergraduate Student, Dept. of Electronic, Seoul National University of Science and Technology.

Research Interests

AI Accelerators & HW/SW Co-design
Model Quantization & Low-Bit Architectures
Network-on-Chip (NoC) & Multi-Core Systems
Reconfigurable & Domain-Specific Architectures

Projects

  1. Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo)
    Ministry of Trade, Industry and Energy, Korea, 2021-2023.
  2. Next-Generation System Semiconductor Design Engineer Development Program
    Ministry of Trade, Industry and Energy, Korea, 2021-2026.
  3. Development of DRAM PIM semiconductor technology for enhanced computing function for edge
    Ministry of Science and ICT, Korea, 2022-2025.
  4. Development of real time monitoring sensor for gas pipe
    Ministry of Trade, Industry and Energy, Korea, 2022-2026.
  5. Development for Processing Software on AI Semiconductor Devices
    Ministry of Science and ICT, Korea, 2022-2029.

Publications

International Journals

  1. 7
  2. 6
  3. 5
  4. 4
  5. 3
  6. 2
  7. 1

International Conferences

  1. 5
    FPGA Based Approximate Vector Operation Accelerator for VLMs
    Raehyeong Kim, Chaebin Lee, Dayoung Lee, Yueri Jeong, Seung Eun LEE
    International Conference on Electronics, Information, and Communication (ICEIC) · Osaka · Jan. 2025
  2. 4
    Approximate Vector Operation Accelerator for Vision-Language Models
    Raehyeong Kim, Jongwon Oh, Jinyeol Kim, Seung Eun LEE
    Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture) (MICRO) · Austin · Nov. 2024
  3. 3
    On-Device Eye Tracking System with Dual Lightweight AI Processors
    Jongwon Oh, Raehyeong Kim, Jinyeol Kim, Seung Eun LEE
    21th International SoC Design Conference (ISOCC) · Hokkaido · Aug. 2024
  4. 2
    Accelerating Embedded WebAssembly Based on FPGA
    Jinyeol Kim, Raehyeong Kim, Jongwon Oh, Seung Eun LEE
    21th International SoC Design Conference (ISOCC) · Hokkaido · Aug. 2024
  5. 1
    Point Cloud Clustering System with DBSCAN Algorithm for Low-Resolution LiDAR
    Sangho Lee, Seongmo An, Raehyeong Kim, Jongwon Oh, Seung Eun LEE
    International Conference on Consumer Electronics (ICCE) · Las Vegas · Jan. 2024

Korean Conferences

  1. 5
  2. 4
    Bird Repellent System based on Embedded AI Processor
    알탕게렐 체웬더르지, 김래형, 안성모, 정유리, 이승은
    2025년 반도체공학회 동계종합학술대회 · Jan. 2025
  3. 3
    Analysis of Model Lightweighting Effects on Korean-English Machine Translation using Transformer
    김래형, 김진열, 박정민, 정유리, 이승은
    Institute of Electronics and Information Engineers, Summer Annual Conference (IEIE) · Jeju · Jun. 2024
  4. 2
    TWS Wearing Detection System based on PPG Sensor using Embedded AI
    김래형, 박정민, 정영우, 이승은
    Institute of Semiconductor Engineers, The 6th General Conference (ISE) · Seoul · Nov. 2023
  5. 1
    Matrix Computation Accelerator based on Systolic Array for Convolution Processing
    박정민, 김래형, 이승은
    Institute of Electronics and Information Engineers, Summer Annual Conference (IEIE) · Jeju · Jun. 2023

Copyrights

Application

  1. 1
    이미지 분류 방법 및 장치
    METHOD AND APPARATUS FOR CLASSIFYING IMAGES
    Application No. 10-2024-0167572, Nov. 2024, Korea (right owned by SeoulTech)
    Application No. PCT/KR2024/019962, Dec. 2024, PCT (right owned by SeoulTech)
    Application No. 24946574.1, Jan. 2026, Europe (right owned by SeoulTech)
    Application No. 19/504,172, Jan. 2026, USA (right owned by SeoulTech)
    Application No. 2026-504690, Jan. 2026, Japan (right owned by SeoulTech)

Copyrighted Softwares

  1. 4
    인공지능 가속기용 파이프라인(Pipeline) 시뮬레이터(Simulator)
    Registration No. C-2025-045303, Oct. 2025, Korea (right owned by SeoulTech)
  2. 3
    광혈류 측정법을 이용한 TWS(티더블유에스) 착용감지 프로그램(program)
    Registration No. C-2024-049980, Dec. 2024, Korea (right owned by SeoulTech)
  3. 2
    자연어처리를 위한 트랜스포머 (Transformer) 추론 가속기
    Registration No. C-2024-049979, Dec. 2024, Korea (right owned by SeoulTech)
  4. 1
    인공지능 가속기 성능 최적화를 위한 명령어 디코더 (decoder)
    Registration No. C-2024-047139, Nov. 2024, Korea (right owned by SeoulTech)

Chips

2026

A Networked Processor Array Supporting High-Bandwidth Host Interface
Jinyeol Kim, Raehyeong Kim, Jongwon Oh, Dayoung Lee, Seongmo An, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2026.03.23
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2025

A Reconfigurable AI Processor Executing Lightweight Algorithms for Sequential Data Applications
Raehyeong Kim, Jinyoung Shin, Jinyeol Kim, Dayoung Lee, Joungmin Park, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2025.09.25
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V
A Pipelined WebAssembly Processor Architecture for Accelerated Execution in Embedded IoT Systems
Jinyeol Kim, Jongwon Oh, Raehyeong Kim, Chaebin Lee, Sangho Lee, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2025.09.25
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V
A Low-Power Point Cloud Clustering System with a DBSCAN Clustering Accelerator based on Cortex-M0
Sangho Lee, Seongmo An, Raehyeong Kim, Jongwon Oh, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2025.02.02
Freq
100MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2024

Convolution-based Feature Extractor Equipped with an Improved Systolic Array Architecture
Joungmin Park, Sangho Lee, Jinyoung Shin, Raehyeong Kim, Seung Eun LEE
Tech
Samsung 28nm LPP
Tape-out
2024.07.18
Freq
50M/200MHz
Core
4mm x 4mm
Power
1.2V

Chip Design Contest

  • 1. "The Design of Robot-Specific Processor for Autonomous Driving",
    Youngwoo Jeong, Yue Ri Jeong, Hyun Woo Oh, Kwang Hyun Go, Raehyeong Kim, and Seung Eun Lee
    20th International SoC Design Conference (ISOCC 2023), Oct. 2023.

Presentations

Awards

Skills

- High-level Programming Language: C, C++, Python, JAVA
- Hardware Description Language: Verilog
- Analysis Language: MATLAB
- FPGA Design Tools: Quartus II, Vivado
- EDA Tools:
Front-end: Design Compiler, VCS, QuestaSim, PrimeTime, Formality
Back-end: ICC2, Calibre, StarRC, ECO
- Circuit Entry Tool: Virtuoso Schematic Editor
- Layout Tool: Virtuoso Layout Suite

Training

2026.07.01-07.03 [IDEC] GPU 프로그래밍의 핵심: CUDA로 배우는 병렬 처리 기술
2026.06.29-06.30 [IDEC] CUDA 기반 GPU 프로그래밍 기초
2026.04.13-04.14 [Cadence] 디지털 프론앤드 RTL 기반 디지털 설계 합성 방법 (Genus)
2025.06.16-06.17 [IDEC] C/C++알고리즘 디자인으로부터 Verilog RTL을 구현/생성할 수 있는 Catapult High Level Synthesis 교육
2025.01.14-01.16 [IDEC] SystemVerilog를 이용한 검증 방법론
2025.01.06-01.07 [IDEC] 인공지능 기초 및 AI 반도체 구조
2024.11.11-11.13 [SK-Hynix] AiM (Accelerator-in-Memory) 이론 및 실습
2024.05.30-05.31 [IDEC] AMBA AXI와 AXI-Stream 설계와 검증
2024.05.22-05.24 [IDEC] AMD Xilinx FPGA HW 구성 이해 및 설계
2023.05.15-05.19 [IDEC] Cell-Based Chip Design Flow 교육
2022.07.08-11.04 [MOEL] AI 자연어처리 전문가 양성 과정

Graduate Courses

CMOS Power Management IC Design | Advanced Artificial Intelligence Processor
Special Lecture on Artificial Intelligence | Advanced Computer Architecture | Resilient Processor Design
Network-on-Chip Design | SoC Design Methodology

Undergraduate Courses

Application of Microprocessor | Capstone Design | Computer Architecture | Computer Programming
Control Engineering | Control System Design | Creative Engineering Design | Digital Signal Processing and applications
Digital System Design | Electrical and Electronic Experiment | Electromagnetics | Electronic Circuit Theory
Electronic Circuits | Engineering Mathmatics | Image Processing | Logic Circuit | Microprocessor | Mobile Programming
Operating System | Semiconductor Engineering | Signal System