← Alumni
Yueri Jeong

Yueri Jeong (2025)

Dept. of Electronic and Information Engineering Seoul National University of Science and Technology
232 Gongneung-ro, Nowon-gu, 01811, Seoul, KOREA

Education & Experiences

2025.02, M.S. in Electronic Engineering, The Graduate School, Seoul National University of Science and Technology.
2023.02, B.S. in Electronic and Information Engineering, Seoul National University of Science and Technology.
2021.04 - 2025.02, Research Assistant, SoC Platform Lab, Seoul National University of Science and Technology.

Research Interests

Computer Programming
Digital System Design

Projects

  1. Development of real time monitoring sensor for gas pipe
    Ministry of Trade, Industry and Energy, Korea, 2022-2026.
  2. Development of DRAM PIM semiconductor technology for enhanced computing function for edge
    Ministry of Science and ICT, Korea, 2022-2025.
  3. ECC for high-speed SCM based PIM
    Korea Electronics Technology Institute, Korea, 2022-2025.
  4. Development for Processing Software on AI Semiconductor Devices
    Ministry of Science and ICT, Korea, 2022-2029.
  5. Developed proximity/healthcare convergence sensor SoC for TWS (True Wireless Stereo)
    Ministry of Trade, Industry and Energy, Korea, 2021-2023.
  6. Next-Generation System Semiconductor Design Engineer Development Program
    Ministry of Trade, Industry and Energy, Korea, 2021-2026.

Publications

International Journals

  1. 2
    An Accelerated Block Searching Approach in A* for Autonomous Mobile Robots
    Jinyoung Shin, Joungmin Park, Jinyeol Kim, Yueri Jeong, Seongmo An, Seung Eun LEE
    IEEE Transactions on Circuits and Systems I: Regular Papers (TCAS-I) · Vol. 72 · pp. 7516-7528 · Jun. 2025
  2. 1

International Conferences

  1. 6
  2. 5
    Analysis of the Impact of LFSR Architecture on Accuracy of Stochastic Computing Processors
    Seongmo An, Sangho Lee, Jinyoung Shin, Yueri Jeong, Seung Eun LEE
    International Symposium on Quality Electronic Design (ISQED) · California · Apr. 2025
  3. 4
    FPGA Based Approximate Vector Operation Accelerator for VLMs
    Raehyeong Kim, Chaebin Lee, Dayoung Lee, Yueri Jeong, Seung Eun LEE
    International Conference on Electronics, Information, and Communication (ICEIC) · Osaka · Jan. 2025
  4. 3
    JPS Accelerator Based Global Path Planning Processor for Autonomous Mobile Robots
    Jinyoung Shin, Joungmin Park, Jinyeol Kim, Yueri Jeong, Seung Eun LEE
    2nd Workshop on Robotics Acceleration with Computing Hardware (Co-located with the IEEE/ACM International Symposium on Microarchitecture) (MICRO) · Toronto · Oct. 2023
  5. 2
    A Real-Time Reconfigurable AI Processor Based on FPGA
    Yueri Jeong, Kwonneung Cho, Youngwoo Jeong, SunBeom Kwon, Seung Eun LEE, Sun Beon Kwon
    International Conference on Consumer Electronics (ICCE) · Las Vegas · Jan. 2023
  6. 1

Korean Conferences

  1. 4
    Bird Repellent System based on Embedded AI Processor
    알탕게렐 체웬더르지, 김래형, 안성모, 정유리, 이승은
    2025년 반도체공학회 동계종합학술대회 · Jan. 2025
  2. 3
    Analysis of Model Lightweighting Effects on Korean-English Machine Translation using Transformer
    김래형, 김진열, 박정민, 정유리, 이승은
    Institute of Electronics and Information Engineers, Summer Annual Conference (IEIE) · Jeju · Jun. 2024
  3. 2
    Intelligent Monitoring System for Slitary Senior Citizens with Vision-Based Security Architecture
    김수희, 정영우, 정유리, 이승은
    Korea Institute of information and Communication Engineering Spring Conference · May 2022
  4. 1
    A Low-Cost Voice Recognition System with Embedded AI Accelerator
    고광현, 정유리, 이승은
    Korean Conference on Semiconductor (KCS) · Jan. 2022

Copyrights

Registration

  1. 1
    소리인식 AI 시스템의 성능향상을 위한 마이크 신호 전처리 방법
    METHOD FOR PRE-PROCESSING TO ENHANCE PERFORMANCE OF SOUND RECOGNITION AI SYSTEM
    Registration No. 10-2917590, Jan. 2026, Korea (right owned by SeoulTech)

Application

  1. 1
    소리 인식 AI시스템의 성능향상을 위한 마이크 신호 전처리 방법
    METHOD FOR PRE-PROCESSING TO ENHANCE PERFORMANCE OF SOUND RECOGNITION AI SYSTEM
    Application No. 10-2022-0179438, Dec. 2022, Korea (right owned by SeoulTech)

Chips

2024

An Error Correcting Code Encoder Utilizing Orthogonal Latin Square Code for HBM Application
Yueri Jeong, Sangho Lee, Seongmo An, Jinyeol Kim, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2024.09.09
Freq
50M/200MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2023

A Network System Processor for Next-Generation Robots based on Cortex-M3
Kwanghyun Go, Soohee Kim, Yueri Jeong, Seongmo An, Seung Eun LEE
Tech
Samsung 28nm FD-SOI
Tape-out
2023.11.27
Freq
50M/200MHz
Core
4mm x 4mm
Power
1.1V/1.8V

2022

Robot-Specific Processor for Autonomous Driving
Youngwoo Jeong, Yueri Jeong, Hyunwoo Oh, Kwanghyun Go, Seung Eun LEE
Tech
Samsung 28nm RFCMOS(1-poly 8-metal)
Tape-out
2022.07.18
Freq
50M
Core
2mm x 4mm
Power
1.0V

Chip Design Contest

  • 1. "The Design of Robot-Specific Processor for Autonomous Driving",
    Youngwoo Jeong, Yue Ri Jeong, Hyun Woo Oh, Kwang Hyun Go, Rae Hyeong Kim, and Seung Eun Lee
    20th International SoC Design Conference (ISOCC 2023), Oct. 2023.

Presentations

  • 1. "A Real-Time Reconfigurable AI Processor Based on FPGA",
    Yue Ri Jeong, Kwonneung Cho, Young Woo Jeong, Sun Beom Kwon, and Seung Eun Lee,
    International Conference on Consumer Electronics (ICCE 2023), Las Vegas, USA, Jan. 2023.

Awards

Skills

- High-level Programming Language: C, Python, Matlab
- Hardware Description Language: Verilog
- Functional Verification Tools: VCS, ModelSim, Spectre
- Circuit Entry Tool: Virtuoso Schematic Editor
- RTL Synthesis Tools: Design Compiler, Quartus II
- Equivanlence Checking Tool: Formality
- Place & Route Tool: IC Compiler II
- Physical Verification Tool: Calibre DRC
- Layout Verification Tool: Calibre LVS
- Static Timing Analysis Tool: PrimeTime
- Layout Parasitic Extraction Tools: StarRC, Calibre PEX
- Layout Tool: Virtuoso Layout Suite
- PCB Design Tools: OrCAD Pspice Designer, Allegro PCB Designer

Training

2024.05.22-05.24 AMD Xilinx FPGA HW configuration Understanding and Designing, IDEC
2022.11.30-12.02 Xilinx ZYNQ Device Design Training, IDEC
2022.11.28-11.29 Deep-Learning Processing Unit Design and Implementation, IDEC
2022.10.24-10.28 Cell-Based Chip Design Flow Training, IDEC
2022.10.11-10.13 SystemVerilog Verification with UVM, IDEC
2022.10.04-10.05 [Siemens EDA] Catapult High Level Synthesis Training to Implement/Create Verilog RTL from C/C++ algorithm design, IDEC
2022.08.25-08.26 SystemVerilog Assertion and API, IDEC
2022.09.21-09.23 Primetime usage and utilization examples, IDEC
2022.04.28-04.29 Utilize FreeRTOS based on ARM Cortex-M processor, IDEC
2021.10.19-10.21 [Synopsys] Block-level Auto P&R using IC Compiler II, IDEC
2021.10.05 [Siemens EDA] Catapult High Level Synthesis Training to Implement/Create Verilog RTL from C/C++ algorithm design, IDEC
2021.07.05-07.16 [Infineon] Professional Training Course for Automotive Semiconductor, Korea Semiconductor Industry Association
2021.06.30-07.02 [Infineon] Basic Training Course for Automotive Semiconductor, Korea Semiconductor Industry Association

Graduate Courses

Advanced CMOS Circuit Design, Advancded Machine Learning, Mixed-Signal Integrated Circuit Desing, Network-on-Chip Design, Compupter Vision,
Fault-Tolerant Processor Design, SoC Design Methodology, VLSI Design

Undergraduate Courses

Electrical and Electronic Experiment, Engineering Mathmatics, Circuit Theory, Electromagnetics,
Logic Circuit, Signal System, Digital Signal Processing, Computer Programmimng(C Programming), Mobile Programming,
Communication Systems, Electronic Circuits, Control Systems Engineering, Microwave Engineering,
Digital System Design, Computer Architecture, Semiconductor Engineering, Semiconductor Devices Application and Design,
Operating System, Image Processing, Internet Protocol, Capstone Design (1), Capstone Design(2)